Technical data

Electrical Characteristics
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Freescale Semiconductor 97
4.3.22.4 SSI Receiver Timing with External Clock
Figure 83 depicts the SSI receiver timing with external clock, and Table 60 lists the timing parameters.
Figure 83. SSI Receiver with External Clock Timing Diagram
Table 60. SSI Receiver with External Clock Timing Parameters
ID Parameter Min Max Unit
External Clock Operation
SS22 (Tx/Rx) CK clock period 81.4 — ns
SS23 (Tx/Rx) CK clock high period 36.0 — ns
SS24 (Tx/Rx) CK clock rise time — 6.0 ns
SS25 (Tx/Rx) CK clock low period 36.0 — ns
SS26 (Tx/Rx) CK clock fall time — 6.0 ns
SS24
SS34
SS35
SS30
SS28
SS26
SS25
SS23
AD1_TXC
AD1_TXFS (bl)
AD1_TXFS (wl)
AD1_RXD
SS40
SS22
SS32
SS36
SS41
(Input)
(Input)
(Input)
(Input)
SS24
SS34
SS35
SS30
SS28
SS26
SS25
SS23
DAM1_T_CLK
DAM1_T_FS (bl)
DAM1_T_FS (wl)
DAM1_RXD
SS40
SS22
SS32
SS36
SS41
(Input)
(Input)
(Input)
(Input)