Technical data

Electrical Characteristics
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Freescale Semiconductor 87
4.3.20.3 Power Down Sequence
Power down sequence for SIM interface is as follows:
1. SIMPD port detects the removal of the SIM Card
2. RST goes Low
3. CLK goes Low
4. TX goes Low
5. VEN goes Low
Each of this steps is done in one CKIL period (usually 32 kHz). Power down can be started because of a
SIM Card removal detection or launched by the processor. Figure 75 and Table 55 show the usual timing
requirements for this sequence, with Fckil = CKIL frequency value.
Figure 75. SmartCard Interface Power Down AC Timing
Table 55. Timing Requirements for Power Down Sequence
Num Description Symbol Min Max Unit
1 SIM reset to SIM clock stop S
rst2clk
0.9*1/FCKIL 0.8 µs
2 SIM reset to SIM TX data low S
rst2dat
1.8*1/FCKIL 1.2 µs
3 SIM reset to SIM Voltage Enable Low S
rst2ven
2.7*1/FCKIL 1.8 µs
4 SIM Presence Detect to SIM reset Low S
pd2rst
0.9*1/FCKIL 25 ns
SIMPD
RST
CLK
DATA_TX
SVEN
Srst2clk
Srst2dat
Srst2ven
Spd2rst