Technical data

Electrical Characteristics
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Freescale Semiconductor 79
Figure 67. Transfer Operation Timing Diagram (Parallel)
NOTE
The Memory Stick Host Controller is designed to meet the timing
requirements per Sony's Memory Stick Pro Format Specifications
document. Tables in this section details the specifications requirements for
parallel and serial modes, and not the MCIMX31C timing.
Table 49. Serial Interface Timing Parameters
1
1
Timing is guaranteed for NVCC from 2.7 through 3.1 V. See NVCC restrictions described in Table 7, "Operating
Ranges," on page 12.
Signal Parameter Symbol
Standards
Unit
Min. Max.
MSHC_SCLK
Cycle tSCLKc 50 — ns
H pulse length tSCLKwh 15 — ns
L pulse length tSCLKwl 15 — ns
Rise time tSCLKr — 10 ns
Fall time tSCLKf — 10 ns
MSHC_BS
Setup time tBSsu 5 — ns
Hold time tBSh 5 — ns
MSHC_DATA
Setup time tDsu 5 — ns
Hold time tDh 5 — ns
Output delay time tDd — 15 ns
tSCLKc
MSHC_SCLK
tBSsu tBSh
tDsu tDh
MSHC_BS
MSHC_DATA
(Output)
tDd
MSHC_DATA
(Intput)