Technical data

MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
76 Freescale Semiconductor
Electrical Characteristics
4.3.15.5.4 Serial Interfaces, Electrical Characteristics
Figure 64 depicts timing of the serial interface. Table 48 lists the timing parameters at display access level.
Figure 64. Asynchronous Serial Interface Timing Diagram
Table 48. Asynchronous Serial Interface Timing Parameters—Access Level
ID Parameter Symbol Min. Typ.
1
Max. Units
IP48 Read system cycle time Tcycr Tdicpr–1.5 Tdicpr
2
Tdicpr+1.5 ns
IP49 Write system cycle time Tcycw Tdicpw–1.5 Tdicpw
3
Tdicpw+1.5 ns
IP50 Read clock low pulse width Trl Tdicdr–Tdicur–1.5 Tdicdr
4
–Tdicur
5
Tdicdr–Tdicur+1.5 ns
IP51 Read clock high pulse width Trh Tdicpr–Tdicdr+Tdicur–1.5 Tdicpr–Tdicdr+
Tdicur
Tdicpr–Tdicdr+Tdicur+1.5 ns
IP52 Write clock low pulse width Twl Tdicdw–Tdicuw–1.5 Tdicdw
6
–Tdicuw
7
Tdicdw–Tdicuw+1.5 ns
IP53 Write clock high pulse width Twh Tdicpw–Tdicdw+
Tdicuw–1.5
Tdicpw–Tdicdw+
Tdicuw
Tdicpw–Tdicdw+
Tdicuw+1.5
ns
IP54 Controls setup time for read Tdcsr Tdicur–1.5 Tdicur — ns
IP55 Controls hold time for read Tdchr Tdicpr–Tdicdr–1.5 Tdicpr–Tdicdr — ns
IP49, IP48
Read Data
IP51, IP53
IP58
IP59
DISPB_SER_RS
DISPB_DATA
DISPB_DATA
(Input)
(Output)
IP56,IP54
IP57, IP55
IP50, IP52
IP61
IP60
IP67,IP65
IP47
IP64, IP66
IP62, IP63
DISPB_SD_D_CLK
read point