Technical data

Electrical Characteristics
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Freescale Semiconductor 53
The timing described in Figure 43 is that of a Motorola sensor. Some other sensors may have a slightly
different timing. The CSI can be programmed to support rising/falling-edge triggered SENSB_VSYNC;
active-high/low SENSB_HSYNC; and rising/falling-edge triggered SENSB_PIX_CLK.
4.3.14.3 Electrical Characteristics
Figure 44 depicts the sensor interface timing, and Table 42 lists the timing parameters.
Figure 44. Sensor Interface Timing Diagram
4.3.15 IPU—Display Interfaces
4.3.15.1 Supported Display Components
Table 43 lists the known supported display components at the time of publication.
Table 42. Sensor Interface Timing Parameters
1
1
The timing specifications for Figure 43 are referenced to the rising edge of SENS_PIX_CLK when the
SENS_PIX_CLK_POL bit in the CSI_SENS_CONF register is cleared. When the SENS_PIX_CLK_POL is set,
the clock is inverted and all timing specifications will remain the same but are referenced to the falling edge of
the clock.
ID Parameter Symbol Min. Max. Units
IP1 Sensor input clock frequency Fmck 0.01 133 MHz
IP2 Data and control setup time Tsu 5 — ns
IP3 Data and control holdup time Thd 3 — ns
IP4 Sensor output (pixel) clock frequency Fpck 0.01 133 MHz
SENSB_MCLK
IP3
SENSB_DATA,
SENSB_VSYNC,
IP2
1/IP1
1/IP4
SENSB_PIX_CLK
(Sensor Input)
(Sensor Output)
SENSB_HSYNC