Technical data

Electrical Characteristics
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Freescale Semiconductor 27
Figure 16. UDMA In Device Terminates Transfer Timing Diagram
Table 25. UDMA In Burst Timing Parameters
ATA
Parameter
Parameter
from
Figure 14,
Figure 15,
Figure 16
Description Controlling Variable
tack tack tack (min) = (time_ack * T) – (tskew1 + tskew2) time_ack
tenv tenv tenv (min) = (time_env * T) – (tskew1 + tskew2)
tenv (max) = (time_env * T) + (tskew1 + tskew2)
time_env
tds tds1 tds – (tskew3) – ti_ds > 0 tskew3, ti_ds, ti_dh
should be low enough
tdh tdh1 tdh – (tskew3) – ti_dh > 0
tcyc tc1 (tcyc – tskew) > T T big enough
trp trp trp (min) = time_rp * T – (tskew1 + tskew2 + tskew6) time_rp
—tx1
1
1
There is a special timing requirement in the ATA host that requires the internal DIOW to go only high 3 clocks after the last
active edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.
2. Make ton and toff big enough to avoid bus contention
(time_rp * T) – (tco + tsu + 3T + 2 *tbuf + 2*tcable2) > trfs (drive) time_rp
tmli tmli1 tmli1 (min) = (time_mlix + 0.4) * T time_mlix
tzah tzah tzah (min) = (time_zah + 0.4) * T time_zah
tdzfs tdzfs tdzfs = (time_dzfs * T) – (tskew1 + tskew2) time_dzfs
tcvh tcvh tcvh = (time_cvh *T) – (tskew1 + tskew2) time_cvh
—ton
toff
ton = time_on * T – tskew1
toff = time_off * T – tskew1
—