Technical data

MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
20 Freescale Semiconductor
Electrical Characteristics
4.3.4 1-Wire Electrical Specifications
Figure 6 depicts the RPP timing, and Table 18 lists the RPP timing parameters.
Figure 6. Reset and Presence Pulses (RPP) Timing Diagram
Figure 7 depicts Write 0 Sequence timing, and Table 19 lists the timing parameters.
Figure 7. Write 0 Sequence Timing Diagram
Table 17. Clock Amplifier Electrical Characteristics for CKIH Input
Parameter Min Typ Max Units
Input Frequency 15 — 75 MHz
VIL (for square wave input) 0 — 0.3 V
VIH (for square wave input) (VDD
1
– 0.25)
1
VDD is the supply voltage of CAMP. See reference manual.
—3V
Sinusoidal Input Amplitude 0.4
2
2
This value of the sinusoidal input will be measured through characterization.
—VDDVp-p
Duty Cycle 45 50 55 %
Table 18. RPP Sequence Delay Comparisons Timing Parameters
ID Parameters Symbol Min Typ Max Units
OW1 Reset Time Low t
RSTL
480 511 — µs
OW2 Presence Detect High t
PDH
15 — 60 µs
OW3 Presence Detect Low t
PDL
60 — 240 µs
OW4 Reset Time High t
RSTH
480 512 — µs
1-Wire bus
DS2502 Tx
“Presence Pulse”
(BATT_LINE)
OWIRE Tx
“Reset Pulse”
OW1
OW2
OW3
OW4
OW5
OW6
1-Wire bus
(BATT_LINE)