Technical data

MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
14 Freescale Semiconductor
Electrical Characteristics
4.1.1 Supply Current Specifications
Table 11 shows the core current consumption for –40°C to 85°C for Silicon Revision 2.0 and 2.0.1 for the
MCIMX31C.
Table 11. Current Consumption for –40°C to 85°C
1, 2
for Silicon Revision 2.0 and 2.0.1
1
Typical column: TA = 25°C
2
Maximum column: TA = 85°C
Mode Conditions
QVCC
(Peripheral)
QVCC1
(ARM)
QVCC4
(L2)
FVCC + MVCC
+ SVCC + UVCC
(PLL)
Unit
Typ Max Typ Max Typ Max Typ Max
Deep
Sleep
• QVCC = 0.95 V
• ARM and L2 caches are power gated
(QVCC1 = QVCC4 = 0 V)
• All PLLs are off, VCC = 1.4 V
• ARM is in well bias
•FPM is off
• 32 kHz input is on
• CKIH input is off
• CAMP is off
• TCK input is off
• All modules are off
• No external resistive loads
• RNGA oscillator is off
0.20 9.00 — — — — 0.04 0.14 mA
State
Retention
• QVCC and QVCC1 = 0.95 V
• L2 caches are power gated (QVCC4 = 0 V)
• All PLLs are off, VCC = 1.4 V
• ARM is in well bias
•FPM is off
• 32 kHz input is on
• CKIH input is off
• CAMP is off
• TCK input is off
• All modules are off
• No external resistive loads
• RNGA oscillator is off
0.20 9.00 0.15 3.50 — — 0.04 0.14 mA
Wait • QVCC,QVCC1, and QVCC4 = 1.22 V
• ARM is in wait for interrupt mode
• MAX is active
• L2 cache is stopped but powered
• MCU PLL is on (400 MHz), VCC = 1.4 V
• USB PLL and SPLL are off, VCC = 1.4 V
•FPM is on
• CKIH input is on
• CAMP is on
• 32 kHz input is on
• All clocks are gated off
• All modules are off
(by programming CGR[2:0] registers)
• RNGA oscillator is off
• No external resistive loads
7.00 19.00 3.00
100.00
0.03 0.90 4.00 6.00 mA