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CP6010 User’s Guide 6U CompactPCI® 64-bit Universal Dual Processor Document Revision 1.1 Ref. : M6010_TECH / July 2005 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Customer Service Contact Information: Kontron Canada, Inc. 616 Curé-Boivin Boisbriand, Québec, Canada J7G 2A7 Tel: (450) 437-5682 (800) 354-4223 Fax: (450) 437-8053 E-mail: support@ca.kontron.com Visit our site at: www.kontron.com © 2005 Kontron, an International Corporation. All rights reserved. The information in this user’s guide is provided for reference only. Kontron does not assume any liability arising out of the application or use of the information or products described herein.
Contents Customer Service Safety instructions Before You Begin ............................................................................................ vi When Working Inside a Computer ...................................................................... vii Preventing Electrostatic Discharge ................................................................... viii Working with Batteries.....................................................................................
3. Installing the Board 3.1 3.2 3.3 3.4 3.5 3.5 3.6 Setting Jumpers ...................................................................................3-1 Processor ............................................................................................3-3 Memory...............................................................................................3-3 On-board Interconnectivity.....................................................................3-5 Backup Battery ...............................
A. MEMORY & I/O MAPS A.1 A.2 Memory Mapping................................................................................ A-1 I/O Mapping...................................................................................... A-2 B. Interrupt Lines B.1 B.2 IRQ Lines .......................................................................................... B-1 PCI Serial Interrupts ........................................................................... B-1 C. Kontron Extension Registers C.1 C.2 C.
E. Connector Pinouts E.1 E.2 E.3 E.4 E.5 E.6 E.7 E.8 E.9 E.10 E.11 E.12 E.13 E.14 E.15 E.16 E.17 E.18 E.19 E.20 E.21 Connectors and Headers Summary ......................................................... E-1 CPCI Bus (J1)..................................................................................... E-2 CPCI Bus (J2)..................................................................................... E-3 CPCI Bus (J3)..................................................................................
Safety Instructions Contents Before You Begin ................................................... vi When Working Inside a Computer ............................. vii Preventing Electrostatic Discharge .......................... viii Working with Batteries.......................................... ix v CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
Before You Begin Before handling the board, read the instructions and safety guidelines on the following pages to prevent damage to the product and to ensure your own personal safety. Refer to the “Advisories” section in the Preface for advisory conventions used in this user’s guide, including the distinction between Warnings, Cautions, Important Notes, and Notes. ♦ Always use caution when handling/operating the computer.
When Working Inside a Computer Before taking covers off a computer, perform the following steps: ♦ Turn off the computer and any peripherals. ♦ Disconnect the computer and peripherals from power sources or subsystems to prevent electric shock or system board damage. This does not apply to when hot-swapping parts. ♦ Follow the guidelines provided in “Preventing Electrostatic Discharge“ on the following page. ♦ Disconnect telephone or telecommunications lines from the computer.
Preventing Electrostatic Discharge Static electricity can harm system boards. Perform service at an ESD workstation and follow proper ESD procedure to reduce the risk of damage to components. Kontron strongly encourages you to follow proper ESD procedure, which can include wrist straps and smocks, when servicing equipment.
Working with Batteries Care and Handling Precautions for Lithium Batteries Your computer board has a standard, non-rechargeable lithium battery. To preserve the battery’s lifetime, the battery enable jumper has been removed for shipping.
Replacing Lithium Batteries Exercise caution while replacing lithium batteries! WARNING Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries, following manufacturer’s instructions. ATTENTION Il y a danger d’explosion s’il y a remplacement incorrect de la batterie. Remplacer uniquement avec une batterie du même type ou d’un type équivalent recommandé par le constructeur.
Preface Contents How to Use This Guide............................................ xii Customer Comments............................................. xiii Advisory Conventions ........................................... xiii Unpacking.......................................................... xiv Powering Up the System........................................ xiv Adapter Cables .................................................... xiv Storing Boards .....................................................
How to Use This Guide This user’s guide provides step-by-step instructions for installation and serves as a reference for operation, troubleshooting, and upgrades. You can find the latest release of this User’s Guide at: ftp://ftp.kontron.ca/support/ For the circuits, descriptions and tables indicated, Kontron assumes no responsibility as far as patents or other rights of third parties are concerned.
Customer Comments If you have any difficulties using this user’s guide, discover an error, or just want to provide some feedback, please send us a message at Tech.Writer@ca.kontron.com. Detail any errors you find. We will correct the errors or problems as soon as possible and post the revised user’s guide in our online Support Library. Thank you.
Unpacking Follow these recommendations while unpacking: ♦ Remove all items from the box. If any items listed on the purchase order are missing, notify Kontron customer service immediately. ♦ Inspect the product for damage. If there is damage, notify Kontron customer service immediately. ♦ Save the box and packing material for possible future shipment. Powering Up the System Before any installation or setup, ensure that the board is unplugged from power sources or subsystems.
Adapter Cables Because adapter cables come from various manufacturers, pinouts can differ. The direct crimp design offered by Kontron allows the simplest cable assembly. All cables are available from Kontron. Storing Boards Electronic boards are sensitive devices. Do not handle or store device near strong electrostatic, electromagnetic, magnetic, or radioactive fields.
UL Certification This product bears the combined UL Recognized Component Mark for Canada and U.S. It indicates investigations to the UL Standard for Safety of Information Technology Equipment, Including Electrical Business Equipment. It is designated to be used in end-product equipment where the acceptability of the combination is determined by Underwriters Laboratories Inc.
1. Product Description Contents 1.1 1.2 1.3 1.4 1.5 1.6 1.7 Product Overview .........................................1-1 What’s Included...........................................1-1 Board Specifications.....................................1-2 Compact PCI Compliance................................1-5 Hot-Swap Capability .....................................1-6 Interfacing with the Environment.................. 1-69 Compatibility with Kontron Products................
1.1 Product Overview Kontron’s CP6010 can accommodate the endless demands for increased bandwidth among missioncritical voice messaging, Computer Telephony Integration (CTI) and Internet/Intranet server applications. This board is a state-of-the-art Dual CPU High Performance Serverworks-based CompactPCI 6U/8HP) system or peripheral processor.
1.
Board Specifications (continued) Front Plate Rear I/O Mezzanine Total Video (F / R) 1 1 - 1 USB 1 2 - 3 Serial 1 2 - 2 PS/2 Mouse - 1 - 1 PS/2 Keyboard - 1 - 1 Ethernet (F / R) 2 2 - 2 Hard Disk - 2 1 3 SCSI (optional) - 1 1 2 Compact Flash - - 1 1 Floppy - 2 - 2 Reset Button 1 - - 1 Description I/O F/R Front or Rear Video PCI video controller (C&T 69030) with 4MB video memory Supports CRT with resolution up to 1600 x 1200, 65K colors On facepl
Board Specifications (continued) BIOS Features Supervisory OS Compatibility • Phoenix BIOS in Boot Block Flash with recovery code; save CMOS in Flash option, and boot from LAN capability • Auto configuration, extended setup and VGA disable by jumper • Diskless, keyboardless, and videoless operation extensions • System, video and LAN BIOS shadowing • Memory remapping to avoid PCI space memory hole • Programmable memory wait states • DMI & HDD S.M.A.R.T.
Board Specifications (continued) Operating Temperature Storage and Transit 0-55°C/32-131°F -40 to +70°C/-40 to 158°F (with 1.6 GHz) Air Flow TBD Humidity 5% to 95% @40°C/104°F 5% to 95% @ 40°C/104°F non-condensing non-condensing Altitude 4,000 m / 13,123 ft 15,000 m / 49,212 ft Shock 5G each axis Bellcore GR-63-CORE Environmental Section 4.3 1.0G, 5-500Hz each axis Vibration 2.0G, 5-50Hz; 3.
1.5 Hot-Swap Capability The CP6010 supports Full Hot Swap capability as per PICMG2.1R2.0. The T6010 can be removed from or installed in the system while it is on (without powering-down the system). Please refer to the PICMG2.1R2.0 specification for additional details. The following paragraphs describe some of the most important features of the hot swap system. 1.5.1 Board Level You may encounter these types of boards: Type of board Non hot swap Basic hot swap Full hot swap 1.5.
the current operating mode of the bus is not compatible or when the back end power is not good or for any other reason. PCIRST#: This signal resets the PCI bus when driven low. High availability can implement this signal as a radial signal from the Hot Swap Controller (HSC) to further control the electrical connection. Platforms that do this must OR the system host’s reset signal with the slot-specific signal to maintain the bused signal’s function.
The Hot Swap Switch is in the lower ejector. It allows the operator to inform the system about the intention to extract the board. A blue LED, located on the board’s faceplate, illuminates when it is safe to extract the board. This LED indicates that the system software has been placed in a state for orderly extraction of a board. The hardware connection layer provides protection only for the hardware during insertions and extractions.
1.5.5.1 Bus-less Operation When the on-board bridge is disabled, the CP6010 is considered bus less. In such cases, the SBC can be hot swapped in a CPCI bus but will not try to participate on the bus. Then, BDSEL# and HEALTHY# preserve their functionality but PCIRST# is ignored. The blue LED mechanism is disabled because the on-board bridge and system host cannot handle it. However, it is possible to read the handle switch and control the blue LED through register 0x192.
1.6.3 Mezzanine The mezzanine is a hardware interface used to increase I/O connectivity of the CP6010 while respecting the dual slot 6U form-factor restrictions. It is built around three sets of connectors: • Mezzanine connector handling IDE signals, additional PCI slots and arbitration signals, 5V power. • Mezzanine connector (the four baseboard PMC connector) that handles a complete PCI signal set, including the REQ/GNT arbitration signal pair. • A two-pin power connector to bring additional 3.
The capability of the CP6010 to connect with other devices is enforced by PCI Mezzanine Cards (PMC). A fully equipped CP6010 board may appear as follows: CP6010 with SCSI Mezzanine CP6010 with HDD Mezzanine 1-11 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
1.7 Compatibility with Kontron Products The CP6010 system processor is a member of Kontron’s CompactPCI product family. When building a basic environment around the CP6010, the platform can be composed of any of the following devices: XL-VHDS XL-PSB XL-LP42 • CP6010 6U system board (up to 8), including other Kontron cPCI SBCs • CTM80-2 6Ux8HPx80mm RTM (for CP6010) • Third party CPCI I/0 board with RTM as needed • Storage module with 2.
2. On-board Features Contents 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 Block Diagram ................................................. 2-1 System Core .................................................... 2-2 CSB5 South Bridge ........................................... 2-5 Super I/O PC87471 ........................................... 2-9 Ethernet Interfaces .......................................... 2-12 System Management Features............................. 2-14 Video Interface......................
2.1 Block Diagram 1.25V Switcher VRM 9.1 1.5V Switcher 1.25V switcher 10A 2.5 v Switcher VRM 9.1 100A 1.5V switcher 3A Prestonia P4 CPU L2 Cache On-die CPU Speed mPGA604 Prestonia P4 CPU L2 Cache On-die CPU Speed mPGA604 L2 (L3) Thermal Diode CACHE P4 CPU CORE (On-die CPU speed) 2.
2.2 System Core 2.2.1 Processors The CP6010 system board supports Intel’s LV (low voltage) Xeon processors as well as the standard voltage Xeon in the FC-uPGA2 604 pin package. Single and dual CPU configurations are supported. In the option list, you will see a list of possible configurations. Both 400MHz and 533MHz front side buses are supported.
• ECC support with correction for up to a nibble (four bits) and detection for multiple nibble • Up to 16GB support (8GB for CP6010 with four DIMMs) • Memory scrubbing support (chipset automatically scans memory and corrects ECC errors) • Support 12 deep for in-order queue • Eight cache line read buffers, eight cache line write buffers • Support for read around write IMB (Inter-Module Bus) • 800MHz IMB for 3.
2.2.3 Memory Interface This product supports up to eight Gigabytes (all 8GB is cacheable) on 4 x 184-pin latching DIMM sockets. Supported memory includes PC-1600/PC-2100 DDR, 2.5V registered SDRAM, non-ECC/ECC mode. The CMIC-LE memory controller is capable of up to a nibble error correction and multiple nibble error detection via. There are two DDR channels 72-bit/133MHz for interleave operation to match the bandwidth of the CPU front side bus.
2.3 CSB5 South Bridge 2.3.1 Enhanced IDE Interface The EIDE interface is part of the CSB5 south bridge. The interface conforms to the ATA specification and supports ATA100 for 100MB/s burst transfers. The board features two channel bus master PCI EIDEs that are dedicated to primary and secondary IDE logical interfaces. The secondary channel is available only from the RTM.
Signal Paths: J3 (CompactFlash connector on Mezzanine) Related Jumpers: W1 must be removed to set the CompactFlash disk as master. BIOS Settings: Section 4.1.2.4 Main Menu Selection: Hard Disk auto-detection to set the type of hard disk. CAUTION 1. When using a CompactFlash, the ambient operating temperature must not exceed 50°C/122°F. 2. Only one device can be on the primary IDE channel. Configure the CompactFlash as master with W1 removed. 3.
64-bit PCI-Mezzanine J1 Related Jumpers: Install W1 when using the hard drive. Note: When using the hard disk, the maximum ambient operating temperature depends on the system’s airflow. Signal Paths: The IDE port is available through IDE0, channel 0. 2-7 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
2.3.2 USB Interfaces USB strengths include: • Capability to daisy chain as many as 127 devices per interface • Fast bi-directional • Isochronous/asynchronous interface • 12MBPS transfer rate • Standardization of peripheral interfaces into a single format USB supports Plug and Play and hot-swapping operations (OS level). These features allow USB devices to be automatically attached, configured and detached, without reboot or running setup.
2.4 Super I/O PC87471 2.4.1 Floppy Disk Interface The on-board floppy disk controller is IBM PC XT/AT compatible. It handles 3.5”, low and high density disks. It can support up to two drives in any combination. Signal Paths: The floppy disk controller interface is available through the J5 connector. BIOS Settings: Section 5.1.2.4, Main Menu Selection, Legacy Diskette A. Section 5.1.2.5.3, Advanced Menu Selection, On-board Device Configuration, Floppy Disk Controller. 2.4.
2.4.3.1 SERIAL PORT A Serial Port A is buffered directly for RS-232 operation. Signals include the complete signal set for handshaking, modem control, interrupt generation, and data transfer. When assigned as Serial Port A, the port is 100% compatible with the IBM-AT serial port in RS-232 mode. Pin 1 2 3 4 5 6 7 8 9 Signal DCD RXD TXD DTR GND DSR RTS CTS RI Signal Paths: The Serial Port A signal path depends on the output configuration you have ordered.
2.4.4 Serial Port B Serial Port B is buffered directly for RS-232 operations and is 16C550 PC-compatible. The interface includes the complete signal set for handshaking, modem control, interrupt generation, and data transfer. This port is 100% compatible with the IBM-AT serial port. Signal Paths: Serial Port B signals are only available through the J3 CPCI I/O connector. Related Jumpers: W6 and W7: insert both jumper if Serial Port B is used in RS-422 or RS-485 mode and need termination resistors.
2.4.4.2 RS-422 Protocol The RS-422 protocol (Full Duplex) uses both RX and TX lines during a communication session. CAUTION In RS-422 mode, install W6 and W7 jumper caps to connect the 120-Ohm termination resistors. (See the Jumper Settings section.) 2.4.4.3 RS-485 Protocol The RS-485 protocol (Half Duplex) also uses differential signals during a communication session.
Pin 1 2 3 4 5 6 7 9 Signal 1000 DA+ DADB+ DC+ DCDBDD+ DD- Signal 10/100 TX+ TXRX+ N.C. N.C. RXN.C. N.C. Signal Paths: The J9 and J10 RJ45 connectors are on the faceplate if the product was ordered with front access. The J9 and J10 RJ45 connectors are on the J3 connector if the produce was ordered with rear access. BIOS Settings: Section 5.1.2.5.2.1, Advanced Menu, PCI Configuration, On-board Ethernet Controller. 2.5.
2.5.2 CPCI I/O Configuration In rear access or 2.16 configuration, the two Ethernet ports are available from a RTM or in a PICMG2.16 system. CAUTION 1. Front and rear panel configurations are not supported. 2. When using a PICMG2.16 system, LAN cannot be used on the RTM. 3. You cannot use a standard RTM with most PICMG2.16 systems. See your system’s manual. Signal Paths: The Ethernet Ports signal paths depends on the output configuration you have ordered for the board.
2.6.2 Power Supply Monitoring All on-board supplies are monitored; any low power rail holds the board in reset. Most power rails also can be monitored though the SM bus by using the ADM1026 or by using the embedded IPMI controller. BIOS Settings: Section 5.1.2.6.1.2, Monitoring Menu Selection, Intelligent System Monitoring, Hardware Monitor Voltage Inputs. 2.6.3 Programmable Dual Stage Watchdog A two-stage digital watchdog timer with software programmable time-out period is available.
2.7 Video Interface The video controller, CT69030, with its integrated 4Meg of high performance SDRAM is capable of CRT resolutions up to 1600 x 1200 x 65K colors (4MB RAM). The video interface features 64-bit 2D graphics engine, 64-bit GUI accelerator engine with multiple window video acceleration. Signal Paths: In front I/O configuration: J8 on the faceplate. In rear I/O configuration: J3 CPCI connector. Related Jumpers: W8 enables or disables the on-board VGA feature. See Section 3.1 – Jumper Settings.
2.7.2 Major Features Description VGA Compatibility The video controller includes all registers and data paths required for the VGA controller and supports extensions to VGA, including resolutions up to 1600 x 1200 x 65K colors noninterlaced. The 24-bit images are displayed at up to 1280x1024 resolution. 2D Graphics Engine The 2D graphics engine is an advanced 32-bit, three-operand engine that accelerates BitBLTs as line draws, polygon draw, and polygon fill.
Related Jumpers: W15-W16-W18 allow you to set maximum bus speed or disable the bridge. Bios Settings: Section 5.1.2.5.2.3, Advanced Menu Selection, PCI Configuration, PCI Performance settings, HB8 related options. 2.8.2 Hot Swap 2.8.2.1 Power Ramping and Overcurrent Protection This product has electrical components that control current ramp-up on the board when the board is hot swapped in the chassis. Current transient upon insertion follows the PICMG2.1R2.0 specification.
2.9 IPMI This product fully supports Intelligent Platform Management Interface 1.1 (IPMI 1.1) and PICMG2.9R1.0 specifications. It uses a 16-bits micro-controller (Hitachi H8/2148) to run an IPMI firmware. 2.9.1 Technical Background IPMI is an extensible and open standard that defines autonomous system monitoring. It is autonomous because all satellite devices send warnings and critical events to a baseboard management controller (BMC) that logs it to a system event log (SEL).
2.9.1.2 IPMI in a Compact PCI Chassis IPMI implementation in cPCI environment is defined by the PCMIG2.9R1.0 specification. The specification gives the pinout of J1 and J2 as well as the addressing scheme. There should be only one BMC in the chassis, or at least on the IPMIB segment). The BMC may reside either on an SBC blade or on an external system management card (SMC), the specification gives full latitude over this.
• Firmware designed and specially made for compact PCI implementation • KCS SMS interface with interrupt support • Dual Port IPMB configurable as two independent channels or in redundant mode BIOS Setup Menu • Out of band management and monitoring using IPMB interface permits access to sensors regardless of SBC state • Sensor threshold fully configurable • Complete IPMI watchdog functionality • Complete SEL, SDR repository and FRU functionality • Master Read/Write I2C supports for external I2
Temperature CPU2 ±1% Current CPU temperature on-die thermal diode (1) LAN heartbeat LAN0 link NA LAN0 link status (PCI bus 1, device 5 function 0) LAN heartbeat LAN1 link NA LAN1 link status (PCI bus 1, device 5 function 1) Oem reset NA Indicates current source holding board in reset Watchdog 2 Processor CPU1 status Processor CPU2 status Processor CPU1 hot Processor CPU2 hot NA NA NA NA NA IPMI watchdog Presence indication of CPU1 Presence indication of CPU2 Thermal over heat indication Therma
2.9.3.2 Firmware Update A DOS IPMI tool package is available from Kontron and includes the utility ipmifwu (IPMI firmware update). This utility allows you to upload a new binary file to the Management Controller. Consult the ipmifwu usage display for complete utility options (by running ipmifwu–h). Visit the Kontron Web site for package and firmware availability or call Kontron Technical Support. Firmware update procedure: 1. Boot DOS. 2. Place both firmware binary and utility ‘ipmifwu.exe’ on a floppy. 3.
2.10.1.1 Post Code Blinker The postcode blinker circuit uses a blinking sequence to display the current post-code value. This sequence restarts every time the post codes value changes. Because post codes changes all the time during a normal boot process, the blinker does not have enough time to complete its sequence and the debug LED blinks meaninglessly. If the boot process succeeds, the post code value has no interest and the BIOS will disable the post code blinker before the operating system launches.
2.10.3 Reset History When an unwanted reset of the board occurs, it is interesting to know the reset source. The reset history circuit logs reset sources. There are two ways to obtain the reset history: • Let the BIOS read and clear the reset history and display the reset source in the summary screen. • End-user software reads and clears the reset history. In addition, the IPMI controller sends events to the system’s baseboard management controller (BMC).
3. Installing the Board Contents 3.1 3.2 3.3 3.4 3.5 3.5 3.6 Setting Jumpers ..........................................3-1 Processor ...................................................3-3 Memory......................................................3-3 On-board Interconnectivity............................3-5 Backup Battery ............................................3-7 Backup Battery ............................................3-7 Board Hot Swap and Installation .....................
3.1 Setting Jumpers 3.1.1 Jumper Description Description CompactFlash Setting Configure Compact Flash or 2.5” hard disk in master mode. W1 Clear CMOS On position 1-2, all CMOS information is cleared. This jumper is not set by default. This jumper must be installed to force a BIOS Flash update with the hot key sequence (Ctrl-E). W2 Test Mode COM2 is used to output post code. Also prevents BMC from generating interrupts. Used for Kontron’s test environment only.
3.1.2 Setting Jumper & Locations 3-2 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
3.2 Processor This product ships with the CPU installed and a thermal solution. Because the thermal solution is a custom one and the thermal interface is critical for passive cooling, Kontron does not guarantee thermal performance if the heat sink is removed and then reinstalled by the end user. If you need to upgrade the CPU, contact Kontron’s technical support. 3.3 Memory Only use validated memory with this product.
WARNING Because static electricity can cause damage to electronic devices, take the following precautions: • Keep the board in its anti-static package, until you are ready to install memory. • Wear a grounding wrist strap before removing the board from its package; this will discharge any static electricity that may have built up in your body. • Handle the board by the faceplate or its edges. 3.3.
3.4 On-board Interconnectivity On-board Connectors and Headers Description Connector Comments CompactPCI Bus J1/J2 CompactPCI I/O J3 CompactPCI I/O J4 (SCSI) SCSI (SCSI board version). CompactPCI I/O J4 (PIM) Mezzanine signals (PIM board version). CompactPCI I/O J5 Legacy connections (IDE and Floppy). Serial Port A J6 Supports standard 9-pin DSUB male connector (faceplate). USB2 J7 4-pin USB connector (faceplate). VGA J8 Supports standard 15-pin DSUB female connector (faceplate).
3.4.2 Front Plate Connectors and Indicators Name Description Comments J6 Serial Port A Standard 9-pin DSUB male connector. J7 USB2 4-pin standard USB connector. SW1 Reset Button Use a small tool to press the button and proceed to a hardware reset of the board. J8 Video Connector Standard 15-pin DSUB female connector. J9, J10 LAN1 and LAN2 Ethernet RJ-45 connectors with built-in activity and link indicators or SFF LC Blue LED Ready to Swap Lights when the board is ready to be swapped.
3.5 Backup Battery An on-board 3.6V lithium battery is provided to back up BIOS setup values and the real time clock (RTC). When replacing, the battery must be connected as follows: 1. Place your index and thumb at each side of the battery and gently pull out the battery. 2. Insert a new one firmly in place with respect to the positive and negative location of the pins. WARNING There is a danger of explosion if you replace the battery incorrectly.
3.5.1 Operation and Preventative Maintenance The operational battery voltage must be between 2.9 and 3.6 volts. When the board is stored and is kept in it's original package, the battery must be replaced when the battery voltage is below 2.9 volts. For preventive operational maintenance, we recommend to verify the battery voltage after 4 years. After that period, we recommend that the safety voltage is checked more often. The normal battery life expectancy depends on the utilisation of the board.
3.6.1 Installing the Card in the Chassis To install a card in a chassis: 1. 2. 3. 4. Remove the filler panel of the slot or see “Removing the Card” below. Ensure the board is configured properly. Carefully align the PCB edges in the bottom and top card guide. Insert the board in the system until it makes contact with the backplane connectors. 5. Using both ejector handles, engage the board in the backplane connectors until both ejectors are locked. 6. Fasten screws at the top and bottom of the faceplate.
3.6.4 Installing a CompactFlash or Hard Drive This product supports all type I and type II CompactFlash modules. WARNING Never install or remove the compact flash while the board is on. To install the CompactFlash: 1. Remove the plastic retainer. 2. Insert the CompactFlash in place. 3. Reinstall the plastic retainer. To remove the CompactFlash: 1. Remove the plastic retainer. 2. Pull the CompactFlash module out. If it is needed, remove the PMC mezzanine before removing the CompactFlash.
4. Building a CPCI System Contents 4.1 Building a CPCI System..................................4-1 4.2 CPCI I/O Signals...........................................4-6 4-0 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
4.1 Building a CPCI System The basic components needed to build a CompactPCI system include: • Chassis • Backplanes • Power supplies • Ventilation unit • System, peripheral or busless boards following application requirements • Other accessories such as storage modules, Ethernet switches, system management cards, and RTM See your system’s manual for more details. 4-1 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
4.1.1 Backplane The CP6010 board draws a lot of power from the backplane. For that purpose, the mezzanine should always fall in a slot where J1 is populated. In other cases, the board will not power up. This imposes some restrictions on the backplane, which you can use with the CP6010. For example, the CP6010 cannot be used in the system slot of an eight-slot, right-adjusted backplane unless there is a ninth slot for the mezzanine. The CP6010 is fully compatible with the XL-PSB, XL-LP42 and XL-VHDS.
4.1.2 Rear-Panel I/O This feature is intended to issue the I/O capabilities of the CP6010 to the rear of the enclosure using a RTM I/O (cTM80-2). The RTM I/O module gathers all the I/O signals of the CPU board and makes them easily accessible through standard headers and connectors located at the rear of enclosure. The cTM80-2 transition module is illustrated below. Note: The CP6010 can detect older RTMs such as the cTM80-2, which forces the CP6010 to remain off.
4.1.3 Storage Devices A mezzanine card that supports CompactFlash or 2.5-inch hard drives is attached to the system processor. If more storage devices or DVD/floppy drives are needed, 6U form factor storage modules are supported with the XL-VHDS system. 3U SCSI trays also are supported in VHDS for very high storage capacity and very high MTBF. This requires a SCSI PMC. Consult you system’s manual for available storage device. 4.1.
4.1.6 Bus Mastering The CP6010 provides seven pairs of REQ/GNT (0-6) arbitration signals through the secondary PCI bus. This means that the board can drive up to seven CPCI slots with PCI bus master capabilities. CPCI I/O Signals This section describes integrated feature signals available on rear panel CPCI I/O connectors (J3, J4, and J5). 4.1.
4.2 CPCI I/O Signals 4.2.1 J3 Signal Specification 4.2.1.
4.2.1.3 Serial Port 1 (COM2) Signal Pin Assignment Description COM2:DCD D3 Data Carrier Detect COM2:RXD B3 Receive Data COM2:DSR C3 Data Set Ready COM2:TXD D4 Transmit Data COM2:RTS A3 Ready To Send COM2:CTS C4 Clear To Send COM2:RI A4 Ring Indicator COM2:DTR B4 Data Terminal Ready 4.2.1.
4.2.1.8 POST Signal Pin Assignment Description POST:DATA E6 POST data POST:CLK D6 POST clock Signal Pin Assignment Description VGA:HSYNC B5 Horizontal synchronization VGA:VSYNC C5 Vertical synchronization VGA:SCLK D5 Video serial clock line VGA:SDATA C6 Video serial data line VGA:RED A6 Analog red video signal VGA:GREEN B6 Analog green video signal VGA:BLUE A5 Analog blue video signal Signal Pin Assignment Description ID0 – ID4 A7, E1, B7, C7, D7 4.2.1.9 Video 4.2.1.
4.2.2 J4 Signal Specification 4.2.2.1 SCSI Interface Signal Pin Assignment Description D0+ to D15+ D4, A5, D5, A7, D7, A8, D8, A10, A24, D24, D22, D25, A1, D1, A2, D2 SCSI data. D0- to D15- E4, B5, E5, B7, E7, B8, E8, B10, B24, E24, B25, E25, B1, E1, B2, E2 TERMPWR1 to TERMPWR9 A16,B16, A15, B15, D15, E15, B11, D11, E11 Termination power. IO +/- D22, E22 In/Out – Indicates the in direction when asserted and the out direction when not asserted.
4.2.2.2 PIM Interface Signal Pin Assignment Description PIM1 to PIM 10 A25, D25, B25, E25, A24,D24, B24, E24, A22, D22 PIM11 to PIM20 B22, E22, A21, D21, B21, E21, A19, D19, B19, E19 PIM21 to PIM30 A18, D18, B18, E18, A16, D16, B16, E16, A15, D15 PIM31 to PIM40 B15, E15, A11, D11, B11, E11, A10,D10, B10, E10 PIM41 to PIM50 A8, D8, B8, E8, A7,D7, B7, E7, A5, D5 PIM51 to PIM60 B5, E5, A4, D4, B4, E4, A2, D2, B2, E2 PIM61 to PIM64 A1, D1, B1, E1 VCC B23 +5V VCC3 E23 +3.
4.2.3 J5 Signal Specification 4.2.3.1 IDE Interface Signal Pin Assignment Description IDE:RESET# E15 Reset signal IDE1:D0-D15 A18, D18, A17, D17, A16, D16, A15, D15, B15, E16, B16, E17, B17, E18, B18, E19, Disk Data – These signals are used to transfer data to or from the IDE device. IDE1:DMARQ D19 Disk DMA Request - This signal is directly driven from the IDE device DMARQ signal. It is asserted by the IDE device to request a data transfer.
4.2.3.2 Floppy Disk Interface Signal Pin Assignment Description FD:INDEX# B11 Index FD:MTR0,1# A11, B12 Motor 0-1 enable FD:DSEL 0,1# D12, E12 Drive 0-1 select FD:DIR# A12 Direction FD:STEP# E13 Step pulse FD:WDATA# D13 Write disk data FD:WGATE# B13 Write gate FD:TRK0# A13 Track 0 FD:WRPROT# E14 Write protected FD:RDATA# D14 Read disk data FD:HDSEL# B14 Head select FD:DSKCHG# A14 Disk change FD:DENSEL# E11 Also named DRVDEN0. Density select.
5. Software Setup Contents 5.1 PHOENIX BIOS Setup Program.........................5-1 5.2 Installing Drivers ....................................... 5-25 5.3 Console Redirection (VT100 Mode) ................ 5-26 5-0 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
5.1 PHOENIX BIOS Setup Program All relevant information for operating the board and connecting peripherals is stored in the CMOS memory. A battery-backed up memory holds this information when the board is powered off; the BIOS setup program is required to make changes to the setup. 5.1.1 Accessing the BIOS Setup Program The system Basic Input Output System (BIOS) provides an interface between the operating system and the hardware of the CP6010 processor board.
The main menu of the Phoenix BIOS CMOS Setup Utility appears on the screen. KONTRON CP6010 BIOS Version 2.6 Main Main Advanced Monitoring Boot Exit Item Specific Help ► ► ► ► F1 System Time System Date [13:30:00] [01/01/2002] Legacy Diskette A [1.44/1.
5.1.2 Menu Bar The Menu Bar at the top of the window lists these selections: Menu Selection Description Main Advanced Monitoring Boot Exit Use this menu for basic system configuration. Use this menu to set the Advanced Features available on your system. Use this menu to configure Monitoring features. Use this menu to determine the booting device order. Use this menu to exit the BIOS. Use the left and right Å and Æ arrows keys to make a selection. 5.1.2.
5.1.2.3 General Help Windows Pressing or on any menu brings up the General Help window that describes the legend keys and their alternates: General Help Setup changes system behaviour by modifying the BIOS configuration. Selecting incorrect values may cause system boot failure; load Setup Default values to recover. arrows select fields in current menu. moves to previous/next page on scrollable menus. moves to top/bottom item of current menu.
5.1.2.4 Main Menu Selection The scroll bar on the right of any windows indicates that there is more than one page of information in the windows. Use and to display all the pages. Pressing and displays the first and last page. You can make the following selections on the Main Menu itself. Use the submenus for other selections. Feature Options Description System Time HH:MM:SS Set the system time. System Date MM/DD/YYYY Set the system date.
Main Menu Selection (continued) Feature Options Description IDE Removable Other ATAPI Same choices as CD-ROM Same choices as CD-ROM Cylinders Set the number of cylinders Heads Set the number of heads. Choices are 1 to 16 Sectors Set the number of sectors per track Maximum Capacity Maximum capacity is displayed according to the cylinders, heads and sectors selected. Multi-Sector Transfers Cylinders Heads Choices are : Disabled, 2, 4, 8 and 16 sectors.
5.1.2.5 Advanced Menu Selection You can make the following selections on the Advanced Menu. Use the submenus for other selections. Feature Options Description Boot Settings Configuration This is a submenu; see section 5.1.2.5.1 PCI Configuration This is a submenu; see section 5.1.2.5.2 Additional setup menus to configure PCI devices On-Board Device Configuration This is a submenu; see section 5.1.2.5.3 Peripheral Configuration Advanced Chipset Control This is a submenu; see section5.1.2.5.
5.1.2.5.1 Boot Settings Configuration You can make the following selections on the Boot Settings Configuration submenu. Use the submenus for other selections. Feature Options Installed O/S Other Win95 Win98 WinMe Win2000 Enable ACPI Yes No Remap Memory above 4GB DIMM Remapping Chipset Remapping Disabled Description Other : General Settings Win95/Win98/WinMe/Win2000: Specific Settings Note : An incorrect setting can cause some operating systems to display unexpected behaviour.
5.1.2.5.2 PCI Configuration You can make the following selections on the PCI Configuration submenu. Use the submenus for other selections. Feature Options Description On-board Ethernet Controller This is a submenu, see section 5.1.2.5.2.1 Additional setup menus to configure embedded Ethernet Controller. Mezzanine PMC Expansion Slot This is a submenu, see section 5.1.2.5.2.2 Additional setup menus to configure PMC Expansion Slot. PCI Performance Settings This is a submenu, see section 5.1.2.5.2.
5.1.2.5.2.2 Mezzanine PMC Expansion Slot Feature Option ROM Enable Master Latency Timer Options Description Enabled Disabled Enabled Disabled Default, 0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h or 00E0h Initialize device expansion ROM. Enable selected device as a PCI bus master. Minimum guaranteed time slice allotted for bus master in units of PCI bus clocks. 5.1.2.5.2.3 PCI Performance Settings Feature Options Description Set the Cache Line Size in DWORDS.
PCI Sec. Incremental Prefetch count PCI Sec. Maximum Prefetch count None, 4, 8, 12, 16, 20, 24, 28 or 32 Dwords Controls Incremental Read Prefetch Dwords count. When an entry's remaining Prefetch Dword count falls below this value, the bridge will prefetch an additional "PCI Sec. Incremental Prefetch count" Dwords (no effect when in PCI-X mode). The count must not exceed half the value in the "PCI Sec. Maximum Prefetch count". Otherwise, no Incremental Prefetch will be performed.
5.1.2.5.4.1 CMIC-LE Settings You can make the following selections on the CMIC-LE Settings submenu. Feature Options Description PCI Write Posting Enabled Disabled Enable/Disable Write Posting for Processor-to-PCI Writes. Defer Reads & Writes Enabled Disabled Enable/Disable Deferred cycles for Processor-to-PCI reads and writes. Clumping is the number of requests (ADS#) initiated by CMIC-LE for every assertion of BPRI# signal.
5.1.2.5.4.2 CIOB Settings You can make the following selections on the CIOB Settings submenu. Feature Memory Read Byte Count Memory Read Byte Count Options 512, 1K, 2K or 4K Bytes 512, 1K, 2K or 4K Bytes Stray Read to Stream Enabled Disabled IMB Transmit Arbiter Slots 1 or 2 Buffer Manager Dual Request Enabled Disabled Description Sets the maximum byte count the device uses when initiating a sequence with one of the Burst Memory Read Commands. CIOB Function 0: On-board LAN and PCIX-to-PCIX Bridge.
Feature Options Description Processor Data Bus Error Enabled Disabled Select "Enabled' to allow logging of Processor Data Bus Error events. Processor Address Bus Error Enabled Disabled Select "Enabled' to allow logging of Processor Address Bus Error events. Processor Bus Protocol Error Enabled Disabled Select "Enabled' to allow logging of Processor Bus Protocol Error events. BINIT# Sampled Asserted Enabled Disabled Select "Enabled' to allow logging of BINIT# Sampled Asserted events.
5.1.2.5.5 Console Redirection You can make the following selections on the Console Redirection submenu. Feature Options Description Console Redirection Disabled Enabled If enabled, console redirection works without the VT100 jumper to use the console redirection. This option is only used when jumper is not present. Com Port Address On-board COMA On-board COMB If enabled, it will use a port on the motherboard. Install the VT100 jumper to use the console redirection.
5.1.2.5.6.1 Cache Memory You can make the following selections on the Cache Memory submenu. Feature Options Description Memory Cache Enabled Disabled Sets the state of memory cache.
5.1.2.6 Monitoring Menu Selection You can make the following selections on the Monitoring Menu. Use the submenus for other selections. Feature Options Description Intelligent System Monitoring This is a submenu, see section 5.1.2.6.1 DMI Event Logging This is a submenu, see section 5.1.2.6.2 View and modify DMI event logs. IPMI System Management OR BMC Device is not available This is a submenu, see section 5.1.2.6.3.1 NOTE: the submenu is not available if the BMC reset jumper is installed (W5).
5.1.2.6.1 Intelligent System Monitoring You can make the following selections on the Intelligent System Monitoring submenu. Use the submenus for other selections. Feature Options Description Intelligent System Monitoring Disabled Enabled Enables/Disables the Intelligent System Monitor device. When enabled, the system will monitor some system states such as temperature and power supplies. Interrupt Generation Disabled Enabled Enables/Disables the generation of interrupts when an event occurs.
5.1.2.6.1.2 Hardware Monitor Voltage Inputs Feature Vcore Sense CPU 1 Vcore Sense CPU 2 Options Description Displays a Status and limits. Display a Status and limits. Hidden if only one processor present. Vcore at CPU 1. Vcore at CPU 1. Vcore Vcc3 3.3V Vcc 5V Vin 2.5V Vtt Vin 1.5V Display a status and limits. Vbat Vin 12V Vin –12 5.1.2.6.1.
5.1.2.6.1.4 Control Voltage Events Note: Any alteration done in this menu will take effect after the board is re-started. Feature Options Description Vcore Sense CPU 1 Voltage Int. Enabled Disabled This option enables voltage events handling. Vcore Sense CPU 2 Voltage Int. Enabled Disabled This option enables voltage events handling. Hidden if only one processor is present. Vcore Voltage Interrupt Vcc3 3.3V Voltage Interrupt Vcc 5V Voltage Interrupt Vin 2.
5.1.2.6.3 IPMI System Management You can make the following selections on the IPMI System Management submenu. Use the submenus for other selections. Feature Options Description IPMI Device and Firmware Information This is a submenu, see section 5.1.2.6.3.1 Intelligent Platform Management Interface (IPMI) information. FRU Board Information This is a submenu, see section 5.1.2.6.3.2 Field Replaceable Unit (FRU) information about the board.
5.1.2.6.3.1 IPMI Device and Firmware Information Feature Static information Description Kontron board identifier. Product ID 6010 Provide a numeric value that identifies a particular System (or board) type. IPMI specification version. IPMI Version 1.0 This field holds the version of the IPMI specification that the controller is compatible with. (Subject to change) Device ID 1 IPMI implementation ID used with this product ID. Provide a numeric value that identifies a particular controller type.
5.1.2.7 Exit Menu Selection Feature Options Description Exit Saving Changes Yes / No Exit Discarding Changes Yes / No Load Setup Defaults Discard Changes Saves Changes Yes / No Yes / No Yes / No Exit Saving Changes Setup and save your changes to CMOS. Exit Discarding Changes Exit utility without saving Setup data to CMOS. Load Setup Defaults Exit utility without saving Setup data to CMOS. Load Setup Defaults Load default values for all SETUP items.
5.1.2.9 Phoenix Quiet Boot Right after you turn on or reset the computer, Phoenix QuietBoot displays the QuietBoot Screen, a graphic illustration created by the computer manufacturer instead of the text-based POST screen, which displays a number of PC diagnostic messages. To exit the QuietBoot screen and run Setup, display the Multiboot menu, or simply display the PC diagnostic messages, you can simply press one of the hot keys described below.
5.1.2.13 Phoenix Multiboot Phoenix Multiboot expands your boot options by letting you choose your boot device, which could be a hard disk, floppy disk, CDROM, Flash Disk, SCSI or LAN. You can select your boot device in Setup, or you can choose a different device each time you boot during POST by selecting your boot device in The Boot First Menu (ESC key). Multiboot consist of : • Setup Boot Menu • Boot First Menu 5.2 Installing Drivers 5.2.
5.3 Console Redirection (VT100 Mode) The VT100 operating mode allows remote setup of the board. This configuration requires a remote terminal that must be connected to the board through a serial communication link. 5.3.1 Requirements The terminal should emulate a VT100 or ANSI terminal. Terminal emulation programs such as Telix© or Procom© can also be used. 5.3.2 Setup & Configuration To set up the VT100 mode: 1. 2. 3. 4. 5. 6. 7. Connect a monitor and a keyboard to your board and turn on the power.
Console Redirection provided by Phoenix based BIOS offers escape sequences to emulate keyboard function keys. The following table lists the escape sequences.
Appendix Contents A - Memory & I/O Maps ......................................................... A-1 B - Interrupt Lines ............................................................... B-1 C - Kontron Extension Registers ............................................. C-1 D –Board Diagrams .............................................................. D-1 E - Connector Pinouts ........................................................... E-1 F - BIOS Setup Error Codes ..........................................
A. MEMORY & I/O MAPS A.1 MEMORY MAPPING FFFFFh System BIOS E0000h 1MB to top of DRAM Optional ROM (Free) LAN BIOS if activated (~30KB) See Note 1 SCSI BIOS (18KB at runtime) See Note 2 Optional ROM (Free) C8000h CC000h Video BIOS C0000h 100000h See detailed map to the right A0000h Video DRAM 0 - 640KB DRAM A0000h Note 1 : LAN BIOS address may vary Note 2 : SCSI BIOS address may vary. Size is only 2KB if no device.
A.
B. Interrupt Lines B.1 IRQ LINES The board is fully PC compatible with interrupt steering for PCI plug and play compatibility.
C. Kontron Extension Registers C.1 FPGA/CPLD REGISTERS DEFINITION Unused (shaded) bits are reserved. It is strongly recommended not to modify unused bit to insure compatibility with other product. The base address is fixed. Bits marked NU are not used on this board. Writing to such bit does nothing and reading is undefined; either 0 or 1 may be returned. Bits with name in green and italics are for reference only; they are used on other Kontron CPCI SBC but not on this board.
C.
FPGA/CPLD registers (continued) D7 Address C.3 D5 D4 D3 READ 0x1A9 Write Data WRITE 0x1A9 NU READ 0x1AA Read data D2 D1 D0 WRITE 0x1AA READ 0x1AB V1 V0 BUSY OPEN TXACK RXACK SCL pin SDA pin WRITE 0x1AB NU NU NU OPEN TXACK NU SCL SDA Write trigger read cycle 0190H: COM2 RS232/422/485 BUFFER CONTROL (FPGA) Address 0x190 C.
PBRST WDO ENPOST HD_ACT RED GREEN Pushbutton reset. Watchdog reset Enable usage of the debug LED to display the last post code of the boot. Setting this bit will tie IDE_ACT to the red LED Set this bit to turn on the red LED. Set this bit to turn on the green LED. History can be cleared by toggling the CLRHIS# bit in register 192h. C.
C.7 0196H: WATCHDOG CONTROL (FPGA) This is a “Kontron SBC” standard dual stage watchdog. However, the second stage time increases from 1ms to 16ms to ease the interrupt handling when using ISA interrupt. So, either a NMI or a legacy interrupt will generate after the specified timeout. Then, the watchdog must be triggered either by writing the WDD[2:0] bits or by clearing the interrupt bit in the 1A2h register. Failure to trigger the watchdog within 16ms will reset the system.
C.10 019CH: BMC CONTROL (CPLD) Address Action D7 D6 D5 D4 D3 READ TEST NU NU POST BMC_TAKE_COM BMC_COM BMC_RST BMC_PRG 0x19C WRITE NU NU NU POST NU BMC_COM BMC_RST BMC_PRG Reset U X X 0 U 0 0 0 TEST POST_COM BMC_TAKE_COM BMC_COM D2 D1 D0 If set, the SBC is inserted in a CPCI test backplane. This is used for Kontron test platform. When ‘1’, COM2 is used to output post code When ‘1’, BMC request COM2 usage. When '1', the SIO is connected to BMC.
C.12 01A0H: INTERRUPT NUMBER (FPGA) Address Action D7 D6 D5 D4 D3 D2 D1 READ NU NU NU NU INT 0x1A0 WRITE NU NU NU NU INT Reset X X X X 0h D0 This register holds the interrupt number on which the FPGA/CPLD is mapped. It is written by the BIOS on boot and read by the software application. This is a legacy ISA interrupt so the range is from 0 to 15. Valid values in this register are 5 and 7. 7:4 3:0 C.13 Undefined Interrupt number 0h to Fh.
C.15 01A3H: JTAG PORT (FPGA) Address Action D7 D6 D5 D4 D3 D2 D1 READ NU NU JEN TRST TMS TCK TDO TDI 0x1A3 WRITE NU NU JEN TRST TMS TCK NU TDI Reset X X 0 0 0 0 0 0 JEN TRST TMS TCK TDO TDI C.16 D0 JTAG enable. All JTAG signals are 3-state when this bit is ‘0’. JTAG TRST. Active high. When ‘1’, will put line PMC_TRST# to 0V. JTAG TMS JTAG clock TDO of JTAG chain, an input for us TDI of JTAG chain, an output for us.
C.19 01ABH: I2C FLAGS (FPGA) D7 D6 D5 D4 D3 D2 D1 D0 V1 V0 BUSY OPEN TXACK RXACK SCL pin SDA pin NU NU NU OPEN TXACK NU SCL SDA NU NU 0 0 NU 1 1 Address Action READ 0x1AB WRITE Reset NU V1, V0 BUSY OPEN TXACK RXACK SCL SDA Version of the I2C engine. Currently 0, 0. This may be used for future enhancement and to ease software usability from one Kontron product to the other. When one, the I2C engine is busy. When one, a transaction is proceeding.
D. Board Diagrams D.1 TOP DEVICES SURFACE MOUNT D-1 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
D.2 BOTTOM DEVICE SURFACE MOUNT D-2 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
3.996 MOUNTING HOLES 0.000 8.759 8.748 VIEW FROM TOP SIDE 6.096 6.098 4.396 4.181 4.456 3.256 3.171 1.871 0.000 D-3 5.085 5.375 4.035 3.050 3.300 3.375 2.725 2.354 1.200 0.710 0.875 0.550 0.000 0.000 D.3 CP6010 User’s Guide Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.
E. Connector Pinouts E.
E.
E.
E.
E.
E.
E.
SERIAL PORT 0 - RS-232 (J6) Signal Pin DSR Pin 6 6 RTS 7 CTS 8 RI 2 RXD 5 3 TXD 5 4 DTR 5 GND Pin VCC 1 DATA- 2 DATA+ 3 GND 4 CRT VGA INTERFACE (J8) Signal Signal RED 1 Analog GND 6 N.C. 11 GREEN 2 Analog GND 7 SDATA 12 BLUE 3 Analog GND 8 HSYNC 13 N.C. 4 N.C. 9 VSYNC 14 GND 5 GND SCLK 10 15 6 1 5 11 1 Signal E.11 1 USB2 (LOCATED ON FACEPLATE) (J7) Signal E.10 DCD 1 E.9 9 9 1 1 6 9 Signal 1 E.
E.13 E.
E.15 RESET SWITCH (SW1) Signal Pin GND 1 RESET# # Active Low Signal E.16 CMOS BATTERY BACKUP CONNECTOR (BT1) Signal E.
E.18 JN1 – PMC ( JN1) Signal Pin Pin N.C. 1 2 -12V Signal GND 3 4 INTA_P64PMC# INTB_P64PMC# 5 6 INTC_P64PMC# BUSMODE1# 7 8 VCC INTD_P64PMC# 9 10 N.C.
E.19 JN2 – PMC (JN2) Signal Pin Pin +12V 1 2 RSV Signal RSV 3 4 N.C. RSV 5 6 GND GND 7 8 N.C. N.C. 9 10 N.C. BMODE2# 11 12 VCC3 PCIRST# 13 14 BMODE3# VCC3 15 16 BMODE4# N.C. 17 18 GND P64AD30 19 20 P64AD29 GND 21 22 P64AD26 P64AD24 23 24 VCC3 IDSEL_PMC 25 26 P64AD23 VCC3 27 28 P64AD20 P64AD18 29 30 GND P64AD16 31 32 P64C/BE2# GND 33 34 N.C.
E.20 JN3 – PMC (JN3) Signal Pin Pin N.C.
E.
F. BIOS Setup Error Codes F.1 POST BEEP Recoverable POST Errors Whenever a recoverable error occurs during POST, Phoenix BIOS displays an error message describing the problem. Phoenix BIOS also issues a beep code (one long tone followed by two short tones) during POST if the video configuration fails (no card installed or faulty) or if an external ROM module does not properly checksum to zero. An external ROM module (e. g.
Code Beeps POST Routine Description 0Ah Initialize CPU registers 0Bh Enable CPU cache 0Ch Initialize caches to initial POST values 0Eh Initialize I/O component 0Fh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Initialize PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1- 2- 2- 3 17h BIOS ROM checksum Initialize cache before memory autosize 18h 82
Code Beeps POST Routine Description 49h Initialize PCI bus and devices (I/O 81h = PCI Bus tested) 4Ah Initialize all video adapters in system 4Bh QuietBoot (logo) start 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 4Fh Multi-Boot (Boot menu support) Initialization 50h Display CPU type and speed 51h Initialize EISA board 52h Test keyboard 54h Set key click if enabled 55h USB initialization (legacy support) 56h Enable Keyboard 58h 2- 2- 3- 1 Test for unexpected inter
Code Beeps POST Routine Description 86h Re- initializes onboard I/O ports.
Code Beeps POST Routine Description C2h Save the current boot type into CMOS C2h Initialize error logging C3h Check the requested boot type (Cold or Warm) C3h Initialize error display function C4h Initialize system error handler C4h Install the IRQ1 vector for BIOS Hot Keys C5h PnP NoteDock dual CMOS (optional) C5h Mark the fact that we are no longer in POST C6h Console Redirection SIO Initialize C7h Remove Console Redirection C8h Force Emergency Flash update check (Ctrl-E and bad CM
Code Beeps 80h Initialize the chipset 81h Initialize the bridge 82h Initialize the CPU 83h Initialize system timer 84h Initialize system I/O 85h Check force recovery boot 86h Checksum BIOS ROM 87h Go to BIOS 88h Set Huge Segment 89h Initialize Multi Processor 8Ah Initialize OEM special code 8Bh Initialize PIC and DMA 8Ch Initialize Memory type 8Dh Initialize Memory size 8Eh Shadow Boot Block 8Fh System memory test 90h Initialize interrupt vectors 91h Initialize Run Time
F.3 ERROR MESSAGES One or more of the following messages may be displayed if the BIOS detects an error during the POST. CMOS BATTERY HAS FAILED 1. If it is the first boot, check for the onboard battery jumper W19. The board is shipped with W19 jumper set to OFF (onboard battery disconnected). This jumper must be shorted (ON) for proper battery operation. 2. CMOS battery is no longer functional. It should be replaced. Consult the Intelligent System Monitoring in BIOS Setup to verify Vbat value.
G. BIOS Update & Emergency Procedure G.1 BIOS UPDATE PROCEDURES The BIOS update procedure can be found with the Emergency Recovery procedure at our FTP site, ftp://ftp.kontron.ca/Support ,in the FAQ section. The CP6010 BIOS requires that the CMOS content be invalidated to force a BIOS update in Emergency mode. Install Jumper W2 to clear the CMOS. G.2 EMERGENCY PROCEDURES Symptoms: • Board does not boot, even after usual hardware and connection verifications.
H. Getting Help At Kontron, we take great pride in our customers’ successes. We believe in providing full support at all stages of your product development. If at any time you encounter difficulties with your application or with any of our products, or if you simply need guidance on system setups and capabilities, contact our Technical Support at: CANADIAN HEADQUARTERS Tel. (450) 437-5682 Fax: (450) 437-8053 If you have any questions about Kontron, our products, or services, visit our Web site at: www.
RETURNING DEFECTIVE MERCHANDISE If your Kontron product malfunctions, please do the following before returning any merchandise: 1) Call our Technical Support department in Canada at (450) 437-5682 or at 1 (800) 354-4223. Make certain you have the following at hand: • The Kontron Invoice number • Your purchase order number • The serial number of the defective board. 2) Give the serial number found on the back of the board and explain the nature of your problem to a service technician.
Return to Manufacturer Authorization Request Contact Name: ______________________________________________________________ Company Name: ______________________________________________________________ Street Address: ______________________________________________________________ City: __________________________ Province/State: _________________________ Country: __________________________ Postal/Zip Code: _________________________ Phone Number: __________________________ Extension: __________
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