Specifications

Ref# 420826 Intel
®
Atom™ processor CE4100 51
Platform Design Guide
Intel Confidential
Table 5-12. DDR3 Memory Clock Topology Table
Traces Description Layer
Min
Length
Maximum
Length
Trace Width Spacing
Spacing
to nearest
signals
TL1 Breakout Micro strip 0.05" 0.5" 4 Mils >= 3.5 Mils
TL2 Lead-in Micro strip 0.5" 1.8" 4 Mils >=7 Mils
>= 20 mils
TL3 Between Devices Micro strip 0.1" 0.8" 4 Mils >=7 Mils
>= 20 mils
TL4 Device Breakout Micro strip 0.05" 0.2" 4 Mils >= 3.5 Mils