Specifications

Ref# 420826 Intel
®
Atom™ processor CE4100 33
Platform Design Guide
Intel Confidential
4.5 Reset Sequence
RESET_INB and SYS_PWR_GOOD signals are all 3.3V power well input signals and used to
initiate a reset sequence for the Intel
®
Atom™ processor CE4100. The Intel
®
Atom™
processor CE4100 releases RESET_OUTB to show IA core is out of reset.
PWROK signal is not used on the Intel
®
Atom™ processor CE4100. This signal can be
connected to ground directly.
RESET_INB
RESET_INB is an active low chip reset signal. This signal must be driven to 3.3 V for a logic
1. This signal should still be driven when in standby mode.
Table 4-2. Layout Recommendations for RESET_INB
Signal
Name
Impedance
Width (W) / Spacing (S) Layer Figure Notes
RESET_INB 55 Ω ±10% W = 4 mils S = 12 mils Microstrip Figure 5-1 1
Note: 1. W represents width of signal; S represents spacing to any other signal.
SYS_PWR_GOOD
SYS_PWR_GOOD is a 3.3V input signal to indicate that all the power rails and clocks are
valid. The Rising edge of this signal is used to latch values of the strap inputs.
Table 4-3. Layout Recommendations for SYS_PWR_GOOD
Signal Name Impedance
Width (W) / Spacing (S) Layer Notes
SYS_PWR_GOOD 55 Ω ±10% W = 4 mils S = 12 mils Figure 5-1 1
Note: 1. W represents width of signal; S represents spacing to any other signal