Specifications

Ref# 420826 Intel
®
Atom™ processor CE4100 31
Platform Design Guide
Intel Confidential
4.4 Power Sequence
From a power management point of view, the Intel
®
Atom™ processor CE4100 only
supports on/off. There is no special power-sequencing requirement for the third party ICs
used on the platform boards. However, the following two requirements for the Intel
®
Atom™ processor CE4100 need to be met at the board level.
Power Supply Sequencing Rule 1
If USB 1.8V comes up prior to USB 3.3V supply, the 3.3V supply must trail within 0.7V of
the 1.8V supply. The same 0.7V restriction applies if USB 3.3V powers down first and
followed by the 1.8V supply.
This is to prevent forward-bias of the on-die diffusion junction of the thick-gate PMOS
(drain-to-bulk) in the pre-driver circuit.
This can be achieved by adding a Schottky diode from V1P8_SOC to V3P3_SOC on the
board.
Power Supply Sequencing Rule 2
The VBUS 5V for downstream peripherals can only be enabled once all the USB on-die
supplies are up, including the 3.3V supply used by the OC buffer.
This is to prevent the USB data pins and the OC pins from being pulled to 3.3V prior to their
supplies being good. Proper supplies must be available to protect against any high-voltage
presented to the buffers.
The VBUS output from the platform is under PIC24 control on the Intel development board.