Specifications

Ref# 420826 Intel
®
Atom™ processor CE4100 125
Platform Design Guide
Intel Confidential
8.10.1 Smart Card Signal Routing
Recommendation
Figure 8-28. SC Signal Topology
Table 8-21. SC0_INS_GP[7] and SC1_INS_GAP[11] Signal Topology List
Traces Layer Min Length
Max
Length
Trace:
Width/Spacing
Spacing from other
signals
w_TL0
Breakout
0.1” 0.5” 4 mils >=4 mils
w_TL1+w_TL2
Micro strip
1” 20” 4 mils >=8 mils
Notes:
• Simulation data based on Cin=10pF (no IBIS models)
• All traces impedance required to be 55 Ω+/- 10%.
• All signals should be referenced to ground. Reference to unbroken power plane is also accepted.