Specifications

112 Intel
®
Atom™ processor CE4100 Ref# 420826
Platform Design Guide
Intel Confidential
8.5.6 NAND_RY_BY_N Signal Recommendation
Sodaville
NAND1
Sodaville
NAND1
Traces Layer Min Length
Max
Length
Trace:
Width/Spacing
Spacing from other
signals
w_TL0
Breakout
0.1” 0.5” 4 mils >=4 mils
w_TL1
Micro strip
0.5” 5.0” 4 mils >=8 mils
w_TL2
Micro strip
0.1” 1.0” 4 mils >=8 mils
w_TL3
Micro strip
0.1” 0.5” 4 mils >=8 mils
Notes:
• Topology shown is for NAND_RY_BY_N between SDV and the first NAND (in socket) only.
• All trace impedance required to be 55 Ω +/- 10%.
• Pull-up resistors are 5% tolerance, Rpu= 453 Ω +/- 1%.
• All signals should be referenced to ground. Reference to unbroken power plane is also accepted.