Specifications

Ref# 420826 Intel
®
Atom™ processor CE4100 107
Platform Design Guide
Intel Confidential
8.4.4 Data Bus B and Control Signals
Data bus B has a different topology than data bus A. The second bus (EXP_DATA_B) section
may be used, if desired, to access “secure” devices, like an external ROM which contains
sensitive code. This data bus is isolated from the EXP_DATA_A bus. The ROM should be
packaged in BGA, and the data lines may be buried in internal layers of the PCB to deter
access and data logging. The SECURE bit in the Expansion Bus configuration register
controls the bus section through which the access is performed.
Figure 8-19. Expansion Bus Topology for EXP_DB<0-7>, EXP_RDB, EXP_WRB and
EXP_IO_RDB @25MHz
Table 8-11. Expansion Bus Topology for EXP_CS[3:0]B
Traces Layer Min Length
Max
Length
Trace:
Width/Spacing
Spacing from other
signals
w_TL0
Breakout
0.1” 0.5” 4 mils >=4 mils
w_TL1+w_TL2
Micro strip
0.1” 8.5” 4 mils >=8 mils
Notes:
• Match all signals within 0.25”.
• All trace impedance required to be 55 Ω+/- 10%.
• All signals should be referenced to ground. Reference to unbroken power plane is also accepted.