Datasheet

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MMCRE64G5MXP-0VB datasheet SSD
Rev. 1.3
MMCRE28G5MXP-0VB
MMDOE56G5MXP-0VB
5.0 Frame Information Structure (FIS)
5.1 Register - Host to Device
[Table 5-1] Register - Host to Device layout (48bit LBA mode, EXT commands, NCQ commands)
[Table 5-2] Register - Host to Device layout (CHS mode)
[Table 5-3] Register - Host to Device layout (28bit LBA mode)
3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 9 8 7 6 5 4 3 2 1 0
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
0
Features Command C R R Reserved (0) FIS Type (27h)
1
Device LBA High LBA Mid LBA Low
2
Features (exp) LBA High (exp) LBA Mid (exp) LBA Low (exp)
3
Control Reserved (0) Sector Count (exp) Sector Count
4
Reserved (0) Reserved (0) Reserved (0) Reserved (0)
3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 9 8 7 6 5 4 3 2 1 0
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
0
Features Command C R R Reserved (0) FIS Type (27h)
1
Device/Head Cylinder High Cylinder Low Sector Number
2
Reserved (0) Reserved (0) Reserved (0) Reserved (0)
3
Control Reserved (0) Reserved (0) Sector Count
4
Reserved (0) Reserved (0) Reserved (0) Reserved (0)
3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 9 8 7 6 5 4 3 2 1 0
1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
0
Features Command C R R Reserved (0) FIS Type (27h)
1
Device/LBA 27:24 LBA 23:16 LBA 15:8 LBA 7:0
2
Reserved (0) Reserved (0) Reserved (0) Reserved (0)
3
Control Reserved (0) Reserved (0) Sector Count
4
Reserved (0) Reserved (0) Reserved (0) Reserved (0)