Flat Panel Television User Manual
Table Of Contents
- TOC
- 01-Overview
- 02-Address Space
- 03-Addressing Modes
- 04-Control Registers
- 05-Interrupt Structure
- 06-Instruction Set
- 07-Clock and Power Circuits
- 08-RESET
- 09-IO PORTS
- 10-BASIC TIMER and TIMER 0
- 11-Timer1
- 12-CounterA
- 13-Timer2
- 14-EMBEDDED Flash Memory Interface
- 15-Low Voltagge Detector
- 16-Electrical Data
- 17-Mechanical Data
- 18-Flash MCU
- 19-Development Tool
- TOC.pdf

S3F80P5 FLASH MCU S3F80P5_UM_ REV1.00
Vss
Xin
Xout
TEST
SDAT/P0.0/INT0
SCLK/P0.1/INT1
nRESET/P0.2/INT2
P0.3/INT3
P0.4/INT4
P0.5/INT4
P0.6/INT4
P0.7/INT4
S3C80P5
24-SOP/SDIP
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
VDD
P2.0/INT5
P3.1/REM/T0CK
P3.0/T0PWM/T0CAP/T1CAP/T2CAP
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
24
23
22
21
20
19
18
17
16
15
14
13
Figure 18-1. Pin Assignment Diagram (24-Pin SOP/SDIP Package)
18-2










