Flat Panel Television User Manual
Table Of Contents
- TOC
- 01-Overview
- 02-Address Space
- 03-Addressing Modes
- 04-Control Registers
- 05-Interrupt Structure
- 06-Instruction Set
- 07-Clock and Power Circuits
- 08-RESET
- 09-IO PORTS
- 10-BASIC TIMER and TIMER 0
- 11-Timer1
- 12-CounterA
- 13-Timer2
- 14-EMBEDDED Flash Memory Interface
- 15-Low Voltagge Detector
- 16-Electrical Data
- 17-Mechanical Data
- 18-Flash MCU
- 19-Development Tool
- TOC.pdf
S3F80P5_UM_ REV1.00 COUNTER A
High
High
Counter A Clock
0H
CAOF = '0'
CADATAL = 01-FFH
CADATAH = 00H
CAOF = '0'
CADATAL = 00H
CADATAH = 01-FFH
CAOF = '0'
CADATAL = 00H
CADATAH = 00H
CAOF = '1'
CADATAL = 00H
CADATAH = 00H
Low
Low
Counter A Clock
0H
CAOF = '1'
CADATAL = DEH
CADATAH = 1EH
CAOF = '0'
CADATAL = DEH
CADATAH = 1EH
CAOF = '1'
CADATAL = 7EH
CADATAH = 7EH
CAOF = '0'
CADATAL = 7EH
CADATAH = 7EH
100H 200H
20H
E0H
E0H
20H
80H
80H
80H
80H
100H 200H
Figure 12-4. Counter A Output Flip-Flop Waveforms in Repeat Mode
12-5