Flat Panel Television User Manual
Table Of Contents
- TOC
- 01-Overview
- 02-Address Space
- 03-Addressing Modes
- 04-Control Registers
- 05-Interrupt Structure
- 06-Instruction Set
- 07-Clock and Power Circuits
- 08-RESET
- 09-IO PORTS
- 10-BASIC TIMER and TIMER 0
- 11-Timer1
- 12-CounterA
- 13-Timer2
- 14-EMBEDDED Flash Memory Interface
- 15-Low Voltagge Detector
- 16-Electrical Data
- 17-Mechanical Data
- 18-Flash MCU
- 19-Development Tool
- TOC.pdf
TIMER 1 S3F80P5_UM_ REV1.00
Timer1 Counter High-byte Register (T1CNTH)
F6H, Set 1, Bank 0, R
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Reset Value: 00H
Timer 1 Counter Low-byte Register (T1CNTL)
F7H, Set 1, Bank 0, R
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Reset Value: 00H
Timer 1 Data High-byte Register (T1DATAH)
F8H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Reset Value: FFH
Timer 1 Data Low-byte Register (T1DATAL)
F9H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
Reset Value: FFH
Figure 11-5. Timer 1 Registers (T1CNTH, T1CNTL, T1DATAH, T1DATAL)
11-6