Flat Panel Television User Manual
Table Of Contents
- TOC
- 01-Overview
- 02-Address Space
- 03-Addressing Modes
- 04-Control Registers
- 05-Interrupt Structure
- 06-Instruction Set
- 07-Clock and Power Circuits
- 08-RESET
- 09-IO PORTS
- 10-BASIC TIMER and TIMER 0
- 11-Timer1
- 12-CounterA
- 13-Timer2
- 14-EMBEDDED Flash Memory Interface
- 15-Low Voltagge Detector
- 16-Electrical Data
- 17-Mechanical Data
- 18-Flash MCU
- 19-Development Tool
- TOC.pdf

S3F80P5_UM_ REV1.00 INSTRUCTION SET
Table 6-5. Opcode Quick Reference (Continued)
OPCODE MAP
LOWER NIBBLE (HEX)
– 8 9 A B C D E F
U
0 LD
r1,R2
LD
r2,R1
DJNZ
r1,RA
JR
cc,RA
LD
r1,IM
JP
cc,DA
INC
r1
NEXT
P
1
↓ ↓ ↓ ↓ ↓ ↓ ↓
ENTER
P
2
EXIT
E
3
WFI
R
4
SB0
5
SB1
N
6
IDLE
I
7
↓ ↓ ↓ ↓ ↓ ↓ ↓
STOP
B
8
DI
B
9
EI
L
A
RET
E
B
IRET
C
RCF
H
D
↓ ↓ ↓ ↓ ↓ ↓ ↓
SCF
E
E
CCF
X
F LD
r1,R2
LD
r2,R1
DJNZ
r1,RA
JR
cc,RA
LD
r1,IM
JP
cc,DA
INC
r1
NOP
6-11










