Datasheet

2
AVR32416
2 Hardware
2.1 Display interface
The typical interface of a display is based on analog and digital inputs. The digital
lines are a data bus, pixel clock, vertical and horizontal synchronization signals and a
data enable line. The voltage input is generally used for contrast control. The LCD
Controller drives all these interface lines. If more inputs are required by the display, it
may be managed by GPIOs (power control, AC bias on some STN displays, backlight
control, etc.) or other peripheral (SPI,I2C etc.).
Figure 1. Display Interface
In order to verify the compatibility of a display some points must be considered.
The LCD controller supports TFT RGB (up to 16M colors), color STN (up to 4096
colors) and Monochrome STN (up to 16 gray shades) displays. Other technologies
may also be used if their interface is compatible.
The screen size is fully programmable. The maximum size supported is 2048 x 2048.
Most of standard display resolution levels are compatible: VGA (640x480), QVGA
(320 x 240), etc. In STN mode, single and double scan modes are supported. For a
double scan mode, the maximum size for each panel is 1024 x 2048.
The interface must be 3.3V compliant. All the display lines should be present in the
lines description list, see Table 2-1. If the display features more lines (i.e. gate
command), the LCD Controller is not able to manage them. They could be managed
by the PIO Controller or other peripherals. The polarity is programmable on PCLK,
DVAL, VSYNC and HSYNC I/O lines.
Table 2-1. I/O Lines of the LCD controller
Name Description Type
CC Contrast control signal Output
HSYNC Line synchronous signal (STN) or Horizontal synchronous
signal (TFT)
Output
PCLK
LCD clock signal (STN/TFT)
Output
VSYNC
Frame synchronous signal (STN) or Vertical synchronization
signal (TFT)
Output
DVAL
STN AC bias signal for the driver or Data enable signal (TFT)
Output
MOD
LCD Modulation signal
Output
32105-AVR32-07/08