Datasheet

Figure 5-12. change of Figure for power up
- 24 -
datasheet SD Card
Rev. 1.0
MMBTFxxGWBCA-xMExx
5.5.2 Reset Level Power Up
Host needs to keep power line level less than 0.5V and more than 1ms before power ramp up.
• T
o assure a reliable SD Card hard reset of Power On and Power Cycle, Voltage level shall be below 0.5V and Time duration shall be at least 1ms.
• The power ramp up time is defined from 0.5V threshold level up to the operating supply voltage which is stable between VDD(min.) and VDD(max.) and
host can supply SDCLK.
Followings are recommendation of Power ramp up:
(1) Voltage of power ramp up should be monotonic as much as possible.
(2) The minimum ramp up time should be 0.1ms.
(3) The maximum ramp up time should be 35ms for 2.7~3.6V power supply.
5.5.3 Power Down and Power Cycle
• When the host shuts down the power, the card VDD shall be lowered to less than 0.5Volt for a minimum period of 1ms. During power down, DAT, CMD,
and CLK should be disconnected or driven to logical 0 by the host to avoid a situation that the operating current is drawn through the signal lines.
• If the host needs
to change the operating voltage, a power cycle is required. Power cycle means the power is turned off and supplied again. Power cycle
is also needed for accessing cards that are already in Inactive S
tate. To create a power cycle the host shall follow the power down description before
power up the card (i.e. the card VDD shall be once lower
ed to less than 0.5Volt for a minimum period of 1ms).
Operating Supply Range
Power On/Cycle
level/duration
Initialization delay The
maximum of 1msec, 74 clock
cycles and supply up time
CMD0
Stable Supply voltage
Power ramp up
1msec
0.5V
2.7V
3.6V
V
DD
min
V
DD
max
Time(not to scale)
VDD Supply
Voltage