Datasheet

- 13 -
datasheet SD Card
Rev. 1.0
MMBTFxxGWBCA-xMExx
5.0 INTERFACE DESCRIPTION
5.1 SD/microSD SD mode Bus Topology / SD/microSD SPI Bus Topology
CLK
Host
V
DD
V
SS
D0~3(A)
CMD(A)
D0~3(B)
CMD(B)
SD Memory
Card(A)
SD Memory
Card(B)
CLK
V
DD
V
SS
D0~D3, CMD
D0~D3, CMD
CLK
V
DD
V
SS
CS(A)
Host
V
DD
V
SS
CLK,
DataIN,
DataOut
SD Memory
CARD(A)
(SPI mode)
SD Memory
CARD(B)
(SPI mode)
CS
V
DD
V
SS
D0~D3, CMD
CLK, DataIN, DataOut
CS
V
DD
V
SS
CS(B)
SD Memory Card System Bus Topology
SD Memory Card system (SPI mode) Bus Topology
The SD/microSD Memory Card system defines two alternative communica-
tion protocols: SD and SPI. The host system can choose either one of
modes. The card detects which mode is requested by the host when the
reset command is received and expects all further communication to be in
the same communication mode. Common bus signals for multiple card
slots are not recommended. A single SD bus should connect a single SD
card. Where the host system supports a high-speed mode, a single SD bus
shall be connected to a single SD card.
The SD/microSD bus includes the following signals:
• CMD : Bidirectional Command/Response signal
• DAT0 - DAT3 : 4 Bidirectional data signals
• CLK : Host to card clock signal
• V
DD
, V
SS1,
V
SS2
: Power and ground signals
The SD/microSD Card bus has a single master (application), multiple
slaves (cards), synchronous start topology (refer to Figure 5-2). Clock,
power and ground signals are common to all cards. Command (CMD) and
data (DAT0-DAT3) signals are dedicated to each card providing continues
point to point connection to all the cards.
During initialization process, commands are sent to each card individually,
allowing the application to detect the cards and assign logical addresses to
the physical slots. Data is always sent (received) to (from) each card indi-
vidually. However, in order to simplify the handling of the card stack, after
initialization process, all commands may be sent concurrently to all cards.
Addressing information is provided in the command packet.
SD Bus allows dynamic configuration of the number of data lines. After
power-up, be default, the SD/microSD Card will use only DAT0 for data
transfer. After initialization, the host can change the bus width(number of
active data lines). This feature allows and easy trade off between hardware
cost and system performance. Note that while DAT1-DAT3 are not in use,
the related Host’s DAT lines should be in tri-state (input mode). For SDIO
cards DAT1 and DAT2 are used for signaling.
The SPI compatible communication mode of the SD/microSD Memory Card
is designed to communicate with a SPI channel, commonly found in various
microcontrollers in the market. The interface is selected during the first
reset command after power up and cannot be changed as long as the part
is powered on.
The SPI standard defines the physical link only, and not complete data
transfer protocol. The SD/microSD Card SPI implementation uses the same
command set of the SD mode. From the application point of view, the
advantage of the SPI mode is the capability of using an off-the-shelf host,
hence reducing the design-in effort to minimum. The disadvantage is the
loss of performance, relatively to the SD mode which enables the wide bus
option.
The SD/microSD Card SPI interface is compatible with SPI hosts available
on the market. As any other SPI device the SD/microSD Card SPI channel
consists the following four signals:
• CS : Host to card Chip Select signal
• CLK : Host to card clock signal
• DataIN : Host to card data signal
• DataOut: Card to host data signal
Another SPI common characteristic is byte transfers, which is implemented
in the card as well. All data tokens are multiples of bytes (8 bit) and always
byte aligned to the CS signal.
The card identification and addressing methods are replaced by a hardware
Chip Select (CS) signal. There are no broadcast commands. For every
command, a card (slave) is selected by asserting (active low) the CS signal
.
The CS signal must be continuously active for the duration of the SPI trans-
action (command, response and data). The only exception occurs during
card programming, when the host can de-assert the CS signal without
affecting the programming process.