Specifications

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4.15.2. Type of Interrupt
The types of Interrupt registers are as follows; interrupts related to the CL765
such as JPEG, MJPEG, Preview, and SRAM read/write and interrupts related to
Flow Control.
a) Interrupt related to the functions of the CL765
Read Status Register 0x05 when Interrupt is generated. When Interrupt is
generated, the relevant Bit is set to ‘1’.
REG 0x05 Description
Bit[0] Indicates the possibility of modem CPU taking direct control of LCD.
Bit[1] Still image/OSD capture completion
Bit[2] Still image/OSD capture status
Bit[4] Completion of displaying image onto LCD
Bit[5] Completion of displaying contents of LCD buffer written by Modem CPU
Bit[6] Watch-Dog Timer Interrupt
Bit[7] Completion of Still image/Movie data transfer to Modem
Bit[8] Status of transferring Still image to Modem CPU, 0=OK, 1=Error (default = 0)
Bit[9] Completion of movie capture
Bit[10] Status of movie capture
Bit[11] Still image decoding completion
Bit[12] Still image decoding status
Bit[13] Movie decoding completion
Bit[14] Movie decoding status
Table 4-26. Interrupt Status Register 1