Specifications
88 Issue Date: 2004/11/05 │ CONFIDENTIAL
CL765 │ Camera Application Processor
Datasheet
│ Doc. #: CLQP-DS-743
4.15. INTERRUPT SETUP
The CL765 supports Interrupt. Interrupt means the completion of several
operations such as Encoding and Decoding. Edge interrupt and Level interrupt
are supported. Interrupt is classified as follows.
a. Operation completion: shows the completion of operations such as
JPEG, OSD, and MJPEG.
b. Operation status: shows the status of operations such as JPEG Capture
and Decoding.
c. Interrupt related to Flow Control
d. Interrupt related to LCD
-. LCD Control Enable : used when CPU requests LCD occupancy while
performing Preview in use of LCD Control Flag. Preview is stopped
and Interrupt is generated.
-. LCD Display End : Generated after displaying each frame on LCD.
Used when CPU directly displays UI on some part of LCD between
frames displayed on LCD. Timing is very important because CPU
should update some part of LCD without skipping Preview after
Interrupt had been generated.
e. Interrupt related to DMA / SD CARD / NAND Flash / USB
4.15.1. Interrupt Mode Setup
a) In Register 0x06, set Interrupt Mode.
Register Description
0x06 Bit[1] EDGE/LEVEL Interrupt setup
0x06 Bit[5:2] The length of EDGE Interrupt
0x091 Bit[5] Set Status Register Clear Mode from LEVEL interrupt Mode
Table 4-24. Interrupt Mode
b) Interrupt Mask setup
Available to control Interrupt generation. Each bit of Interrupt Status
register and Interrupt Mask register correspond one-to-one. To generate
the interrupt necessary for Status register, relevant bit should be cleared
from Interrupt mask.
Status Register Mask Register Description
0x05 0x0C Interrupt related to the CL765 Operation
0xe8 0xe7 Interrupt related to Flow Control and etc
Table 4-25. Interrupt Mask Mode










