Specifications

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When supplying C_MCLK to Sensor, it generates data in synchronization

with C_PCLK’s Positive Edge. At this moment, the CL765 receives the

Sample Data in CbY1Y2 order. As seen in above diagram, the CL765 receives

the Data and get ready to process it in synchronization with SCLK clock

domain that received from the Positive Edge of C_PCLK. At this point, if the

C_D[7:0] is out of order during the sampling Edge of C_PCLK by external

source, somehow, the corrupted display might be appear on the LCD with

serious error. Therefore, it is important to design the circuit where the Data

stays stabilize during the Sampling Edge of C_PCLK.

In case the above condition is not satisfied, it is available to get the margin

by changing the registers in the CL765. Register 0x25 Bit[3:2] is defined for

this.

- Bit[2] : Means the phase difference between SCLK (the internal clock) and

C_MCLK when generating. If this bit is set, the phase difference

between SCLK and C_MCLK is 180˚.

- Bit[3] : Decides whether the CL765 shall sample from the Rising

Edge/Falling Edge of C_PCLK or not. In most cases, 0x25 Bit[3:2]

should be decided by monitoring SCLK/C_MCLK/C_PCLK.

d) Sensor Power Supply Control (0x24)

In general, if Sensor Power control (in use of C_PWDN Pin recommended

by CORE LOGIC) is used, the power of the sensor is provided by

controlling 0x24 bit[0]. But 0x24 Bit[0] should be Active when controlling the

power of the sensor In use of GPIO of Modem chip or that of the CL765. As

seen in Figure 1-1, when setting 0x24 Bit[0], the only phenomenon seen from

the outside is that the state of C_PWDN is changed to Low. But in fact, the

state of each pin and reset is decided in the inside of the CL765 and a series

of process, such as starting to provide C_MCLK, to activate the sensors is

processed. Therefore, the sensor does not run until setting 0x24 Bit[0] even

though power is provided to the sensor.

1mS 1mS

1mS

Sequence:Using GPIO

GPIO

C_Vdd

C_PWDN

C_RST

C_IIC

Figure 4-33. Sensor Power Supply Sequence