Specifications

CORE LOGIC Proprietary and Confidential
107
www.corelogic.co.kr │
C. Page Read
To read 256byte or 512byte-page, the registers should be set as following flow
chart. The ECC generated from read data is compared with the ECC of the spare
area. If the result is Fail, the fail is reported in use of an interrupt or polling. Also,
the result is reported to DMA controller, too. ECC verification is available only
when Spare R/W is enabled under DMA command mode.
Figure 4-39. Page Read – Flowchart