Specifications

CDS Carrier Architecture
MPC8555E Configurable Development System Reference Manual, Rev. 1
Freescale Semiconductor 3-31
Table 3-28. CDS Local Bus ‘ADDR’ Header Definition
Pin Signal Mictor Definition
3 LACLK Even clock
4LCL_RST
Even D15 (MSB)
5IRQ0
Even D14
6 TP28 Even D13
7 Even D12
8 Even D11
9 Even D10
10 Even D9
11 Even D8
12 CLA23 (MSB) Even D7
13 CLA22 Even D6
14 CLA21 Even D5
15 CLA20 Even D4
16 CLA19 Even D3
17 CLA18 Even D2
18 CLA17 Even D1
19 CLA16 Even D0 (LSB)
36 PCICLK Odd clock
35 CLA15 Odd D15 (MSB)
34 CLA14 Odd D14
33 CLA13 Odd D13
32 CLA12 Odd D12
31 CLA11 Odd D11
30 CLA10 Odd D10
29 CLA9 Odd D9
28 CLA8 Odd D8
27 CLA7 Odd D7
26 CLA6 Odd D6
25 CLA5 Odd D5
24 CLA4 Odd D4
23 CLA3 Odd D3
22 CLA2 Odd D2
21 CLA1 Odd D1
20 CLA0 (LSB) Odd D0 (LSB)