Specifications

1A Maximum
to the component.
18A Maximum
3. Ground plane connections should be made with two vias close
FANSINK HEADER
VCORE Output
1. All components in the power path (large/red bus)
2. No vias or thermal reliefs allowed on power path components.
should be on the same layer, with area filled connections.
10 cm^2 on top layer
Date Changed:
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Engineer:
Revision:
Page:Title:
Project:
freescale
Freescale Semiconductor
7700 W. Parmer Ln
Austin, Texas 78729
Gary Milliorn
1.1
05
CDC_MPC85xx_783
Processor Core Power Supply
6/11/2004
2:52:16 pm
semiconductor
TM
POWER SUPPLY LAYOUT RULES
THERMAL HEATSINK PLANE FILL