Specifications

D
TM
Date Changed:
Time Changed:
Engineer:
Project:
7
Revision:
Page:Title:
8
7700 W. Parmer Ln
Austin, Texas 78729
C
A
B
D
C
HIGH-SPEED EXTERNAL CLOCK
Optional high-speed/flexible
clock source.
65
Gary Milliorn
1.2
10
CDS_Carrier
High-Speed Clock Generation
11/8/2005
10:30:37 am
4321
8
A
DEFAULT=124MHz
1234 7
semiconductor
56
B
freescale
Freescale Semiconductor
LOCAL SYSTEM CLOCK
Used on non-PCI HIP boards or stand-alone.
R150
0
R127
Y1
125.00MHz
GND
21
OE
OUT
34
V3.3V
10
VCC_3.3
33R148
6
5
4
33R166
15
V5
16
V6
17
V7
18
V8
6
VDD1 VDD2
23
7
X1_ICLK
X2
8
3
S0
S1
4
S2
510
V0
11
V1
12
V2
13
V3
14
V4
PDTS
24
R0
R1
25
26
R2
27
R3
R4
28
1
R5
R6
2
22
REF
U42
ics525_02.ssop28
CLK
21
9
GND1 GND2
20
19
C311
0.1uF
5D8
R174 33
C312
0.1uF 0.1uF
C309
2
1
4
100
R178
74lvc1g125.sc70
U30
2
1
4
U26
74lvc1g125.sc70
No_Stuff
conn.sma
P2
5D8
3
14C1
R172
100
No_Stuff
2
1
4
100
R175R179
100
3
2
1
4
0.1uF
C249
0.1uF
C317
VCC_3.3
74lvc1g125.sc70
U36
U44
16.000MHz
GND
21
OE
OUT
34
V3.3V
1
0
5C8
5C8
33R165
5B1,7A1,14C1,26D1
6D1
VCC_3.3
C268
0.1uF
100
R171
0.01uF
C286
2
1
R170
100
10R177
9B1
R140
100
6C1
6B1
470uF
C310
+
2
1
4
VCC_3.3
100K
R135
9
20
XTAL_SEL
22uF
C285
+
U28
74lvc1g125.sc70
2
SDATA
S_LOAD
3
TEST
26
VCC1
27
28
VCC2
VCC3
32
VCC_PLL1
4
5
VCC_PLL2
XTAL_IN
8
XTAL_OUT
M6
N0
22
23
N1
16
NC1
NC2
21
24
NC3
10
OE
PWR_DOWN
6
P_LOAD
11
SCLK
1
30
FREF_EXT
7
25
GND1
GND2
29
12
M0
M1
13
14
M2
M3
15
17
M4
M5
18
19
16D1
16D1
mpc9259fa.lqfp32
U29
FOUT
31
FOUTn
2
1
4
VCC_3.3
20B1
6C1
R146 33
U32
74lvc1g125.sc70
2
1
4
74lvc1g125.sc70
U33
2CM_MAXREF_CLK
RTC_CLK
SHORT
SHORT
2
VCC_3.3
NC
NC
LCLK_V(6:1)
LCLK_R(4:1)
1CM_MAXUTRTCCLKOMCLK_DIS*
PHY_CLK0
SHORT
1CM_MAXSYSCLK
SYSCLK
UTSYSCLKO 1CM_MAX
POWER_TRACE
REF16 1CM_MAX
NC
LCLK_S(2:0)
NC
NC
HS_TXCLKn
HSCLKDP_HSCLK
NC
NC
NC
NC
NC
CFGRST*
NC
NC
NC
HSCLK_DATA
HSCLK_CLK
HSCLK_LD*
SYNC_CLK
SYNCHRO*
SHORT
NC
SHORT
SHORT
CTLCLK
HS_TXCLKp
HSCLKDP_HSCLK
SHORT_POWER
NC
NC
NC