User's Manual

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Note d’étude / Technical document : URD1– OTL
5665.3 – 003 / 72238 Edition 01
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Figure 21: Example of a connection to a data cable with a MAX3238E
4.7.4 Partial V24 (RX-TX-RTS-CTS) – connection HiLoNC V2 - host
When using only RX/TX/RTS/CTS instead of the complete V24 link, the following schematic could be used.
Figure 22: Partial V24 connection (4 wires) between HiLoNC V2 and host
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As DSR is active (low electrical level) once the HiLoNC V2 is switched on, DTR is also active (low
electrical level), therefore AT command AT+Ksleep can switch between the two sleeps mode available for the
HiLoNC V2.
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DTR input signal is internally pull upped to VGPIO with a 100KΩ, this result in 28µA of extra consumption.
RXD
CTS
DSR
DCD
RI
DTR
TXD
RTS
HiLoNC V2 Module
TXD
CTS
DSR
DCD
RI
DTR
RXD
RTS
DTE Device
2.8V signals
39
40
33
34
35
36
38
37
2.8V signals
Note: GND is not
represented
DCE point of view
DTE point of view