Instruction Manual


Réf. : SCT TMO MASV3 SPEC
30
Rev. : H
Réf. sec. : 2x xxx xxx – x
Date : 12/05/04
DRAFT
Document
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. All rights of reproduction and disclosure reserved.
Page 30
This document contains information on a product under development. SAGEM reserves the right to change or discontinue this product
without notice.
DCD
Output
Data Carrier Detect
E2
DTR
Input
Data Terminal Ready
D3
CTS
Output
Clear To Send
C5
RTS
Input
Request To Send
D4
TXD1
Output
UART transmit 1
B5
RXD1
Input
UART receive 1
B7
TXD2
Output
UART transmit 2
B8
RXD2
Input
UART interface
UART receive 2
B9
TXIR
Output
IRDA transmit
B6
RXIR
Input
IRDA receive
D7
CMDIRDA
Output
IRDA interface
IRDA command
C7
INT1
Input
Interrupt
Q3
SCLI2C
Output
Clock
C11
SDAI2C
In/out
Data
B11
INTI2C
Output
I2C interface
Interrupt
H6
CHARGEUR
Input
Charge
O3,O4,O5
VCCS
Input
M6
LEDC
Output
Load interface
LED connection for charge activity
L6
TESTRST
Input
Reset
Reset system signal
P4
ITDATA
Input
Accessories detection
Interrupt signal
N6
DPROC<0>
In/output
Data bus
K5
DPROC<1>
In/output
Data bus
K4
DPROC<2>
In/output
Data bus
K3
DPROC<3>
In/output
Data bus
K2
DPROC<4>
In/output
Data bus
J2
DPROC<5>
In/output
Data bus
J3
DPROC<6>
In/output
Data bus
J4
DPROC<7>
In/output
Data bus
I4
DPROC<8>
In/output
Data bus
I3
DPROC<9>
In/output
Data bus
I2
DPROC<10>
In/output
Data bus
H2
DPROC<11>
In/output
Data bus
H3
DPROC<12>
In/output
Data bus
H4
DPROC<13>
In/output
Data bus
G4
DPROC<14>
In/output
Data bus
G3
DPROC<15>
In/output
Data bus
G2
RWPROC*
Output
Write
I5
OEPROC*
Output
Read
F5
CSPROC1*
Output
Chip select 1
F6
APROC<1>
Output
Address bus
F4
APROC<2>
Output
Address bus
F3
APROC<3>
Output
Parallel interface
For
Companion chip
connection
Address bus
F2
DLCD<0>
In/output
Data bus
I13
DLCD<1>
In/output
Data bus
N18
DLCD<2>
In/output
Data bus
L16
DLCD<3>
In/output
Data bus
I12
DLCD<4>
In/output
Data bus
G17
DLCD<5>
In/output
Parallel
LCD interface
Data bus
K15