Specifications

66 ST-133/ST-133A Controller Manual Version 2.H
Specifications
Back panel I/O
Pre-Trigger Input: BNC (10 kΩ impedance), TTL level used only to start a bracket
pulse.
External Trigger Input: BNC, fully configurable trigger input (see Trigger
specifications below).
T0 Output (Selected Trigger Output): BNC, TTL level, output of trigger selector. If
burst pulsing is turned Off, the T0 Output is asserted after either an External or an
Internal trigger and a pulse ensemble is then produced. The T0 Output is deasserted
when a pulse ensemble is completed. A pulse ensemble consists of a Gate Start
pulse, a Gate Stop pulse and an Auxiliary pulse.
If burst pulsing is turned On, the T0 Output is deasserted when the last pulse
ensemble is completed.
Auxiliary Trigger Output: BNC,
AC-coupled pulse output. The
auxiliary timer's output is
available to the user through a
rear panel BNC for triggering
other system components. The
host software sets the Delay
Time of the auxiliary trigger
output with respect to the PTG
trigger time.
Figure 32 is an oscilloscope
screen capture of the Auxiliary
Trigger output. For proper
timing, users should trigger on
the leading edge of the output
Figure 32. Auxiliary Trigger Output
waveform (point 1 as indicated in Figure 32 and not at point 2, 3, or 4).Use positive-
edge triggering and a positive trigger level from +1.0 to +1.5 V. If using it to drive
logic, we suggest that the 74HCT or 74ACT logic-device families be used.
Timing Gen Interface: DB9 connector carrying the Start, Stop and Bracket Pulse
signals. These signals are connected to the head to control the photocathode and
MCP gating and are not directly available.
Gate Start pulse: switches photocathode On.
Gate Stop pulse: switches photocathode Off.
Bracket Pulse: In bracket pulsing On operation, biases MCP On; timing
controlled by software; asserted before Gate Start
*
and deasserted after Gate
Stop.
*
Value differs for each head (500 ns to 700 ns typical) and is stored in NV RAM.