Datasheet

Technical Note
6/31
BD5446EFV
www.rohm.com
2011.06 - Rev.C
© 2011 ROHM Co., Ltd. All rights reserved.
Pin configuration and Block diagram
40
39
38
37
36
35
34
33
32
31
30
29
48
47
46
45
44
43
42
41
28
3
4
5
6
7
8
9
14
15
16
17
18
19
20
21
10
11
12
13
22
23
24
51
50
49
54
53
52
27
26
25
I
2
S/LJ
Interface
Gain
Selector
PWM
Modulator
×8 Over
Sampling
Digital
Filter
Control
Interface
TEST
DAC
Selector
High Temperature Protection
Under Voltage Protection
Clock Stop Protection
Output Short Protection
Output DC Voltage Protection
1
2
VCCA
NC
REG_G2
FILA
Power
Limiter
GNDA
DAC
REG_3
REG_G1
Driver
1P
Driver
1N
GNDP1
REG_G1
REG_G1
VCCP1
NC
NC
NC
Driver
2P
Driver
2N
GNDP2
REG_G2
REG_G2
VCCP2
NC
NC
NC
NC
I
2
S/LJ
Selector
FILP