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P r a c t i c a l S e l e c t i o n o f S i g n a l - L i n e F i l t e r s
as used in the previous examples. The results
are disappointing: Even though the risetime is
signicantly reduced, the frequency spectrum is
only marginally reduced. This results from the
generally poor ground connection of a three-pole
capacitor which is relatively high in inductance
compared to a R-C-R combination in surface
mount technology (SMT). Some offered three-pole
capacitors are poor high frequency lters.
Another example is a wideband choke used as a
signal line lter.
Figure 6 shows the results. The frequency spec-
trum is poorly suppressed, but the risetimes are
signicantly slowed down. It should be noticed
here that a time domain analysis only will lead
to poor EMC performance and the wrong con-
clusions. This is an expensive measure that will
inuence the digital function with disappointing
EMC suppression.
As a nal example a modern SMT chip lter con-
sisting of two ferrite beads and a feed-through
capacitor is shown.
Figure 6
Figure 7
Figure 7 shows the results which are relatively
good. The spectrum is limited and the risetime is
surprisingly fast. The over- and under-shoot is so-
mewhat disappointing. This occurs in lters which
consist of only inductance and capacitance.
In conclusion, it is observed that the digital circuit
designer who is aware of EMC problems, must
look at the frequency domain and not only at the
time domain or a false picture may result. Theore-
tically, everything is contained in the time domain
which is only differently presented in the frequency
domain. The problem rests with the linear pre-
sentation and the resolution of the oscilloscope.
Using a generally poor oscilloscope will not lead
to a theoretically optimal solution.