User Manual
Register Map Tables
5-3
12 Drive fault latch bits – word 1
0 Overcurrent, steady state (OC) 350ms
1 Overcurrent, at acceleration (OCA) 350ms
2 Overcurrent, at deceleration (OCd) 350ms
3 Overcurrent, at DC braking (OCb) 350ms
4 High DC bus voltage (HU) 350ms
5 Low DC bus voltage (LU) 350ms
6 Electronic thermal overload (OL) 350ms
7 Drive overtemperature (OH) 350ms
8 Function loss (FL) 350ms
9 Default parameter restore — checksum error (CHS) 350ms
10 Communication loss between Regulator/PC/OIM (SrL) 350ms
11 Spurious host PC comm interrupt (UAr) 350ms
12 Self-tuning status (SF). Vector only. 350ms
13 Overspeed (OSP). Vector only. 350ms
14 Motor output phase loss (OPL) 350ms
15 Overfrequency (OF) 350ms
13 Drive fault latch bits — word 2
0 Network communication loss (nCL) 350ms
1 DC bus charging bypass contactor (bYC) 350ms
2 High time identification aborted (HId) 350ms
3 Identification Request not yet performed (nld). V/Hz only. 350ms
4 High line voltage (HIL) 350ms
5
NVRAM write failure (EEr)
350ms
6 Drive power electronic overload (PUo) 350ms
7 Earth current failure (ground fault) (EC) 350ms
8 Asymmetrical bus charge (UbS) 350ms
9 Missing Power Module ID connector (PUc) 350ms
10 Power Module not identified (PUn) 350ms
11 Input phase loss (IPL) 350ms
12 Encoder loss (EL) 350ms
Table 5.2 – Register Assignment for Drop_1 Area Read Only Registers (Continued)
Register Bit Description or GV3000/SE Parameter Settings Update*
*Update Times: 5 ms = 5 ms. 350 ms = 350ms or less.