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ManualsBrandsRockwell Automation ManualsEquipment20D PowerFlex 700S Drive Ph I Control, Frames 1...11

Programming and Parameters 3-35

244 Encdr1 Error

Indicates the error status of Encoder 1.

245 Port1 Regis Ltch

Displays the registration data of port 1. Indicates the position reference counter value

latched by the external strobes. The strobe signal used to trigger the latch is configurable

by Par 246 [Port1 Regis Cnfg].

Default:

Min/Max:

-/+2147483648

32-bit

Integer

246 Port1 Regis Cnfg

Configures the registration latch at port 0.

• Bit 0 [RL Encdr1 Sel] selects the encoder for the input source of latched data. Setting bit 0 selects encoder 1, resetting the bit to zero selects encoder 0.

• Bits 1 [RL Trig Src0] and 2 [RL Trig Src1] select the trigger source (see Table 246A: Trigger Source Settings

• Bits 3 [RL Trig Edg0] and 4 [RL Trig Edg1] select which edges signal the position (see Table 246B: Edge Selection Settings

• Bits 5 [RL Dir Rev] and 6 [RL Dir Fwd] set the direction of position capture (see Table 246C: Direction Settings

• Bits 8 [Ext Filt 1], 9 [Ext Filt 2], 10 [Ext Filt 3], and 11 [Ext Filt 4] configure a filter for the digital input 1 and 2 (seeTable 246D: Filter Settings

). The filter

requires the input signal to be stable for the specified time period. Input transitions within the filter time setting will be ignored.

247 Port1 Regis Ctrl

Configures the registration control for port 1.

• Set bit 0 [Arm Request] to arm the registration logic for the next trigger event. The particular latch will be armed and ready to be strobed on the next

occurrence of the trigger input.

• Set bit 1 [DisArm Req] to disarm the registration logic for next trigger event.

No.

Name

Description Values

Linkable

Read-Write

Data Type

Options

Reserved

Phase Level

Phase Loss

Quad Loss

Encdr Missing

Default00000000000000000000000000000000

Bit 313029282726252423222120191817161514131211109876543210

0 = False

1 = True

Table 246A: Trigger Source Settings

Bit 2 1

0 0 Digital Input 2 AND Encoder 0 (Primary Encoder) Z Phase

0 1 Digital Input 3 (default setting)

1 0 Digital Input 2

1 1 Encoder 0 (Primary Encoder) Z Phase

Table 246C: Direction Settings

Bit 6 5

0 0 Disable capture

0 1 Capture position during Reverse rotation

1 0 Capture position during Forward rotation

1 1 Capture position during either rotation

Table 246D: Filter Settings

Bit 11 10 9 8 Input Filter Setting

0000Filter disabled

0001100 ns filter

0010200 ns filter

0011300 ns filter

0100400 ns filter

0101500 ns filter

0110600 ns filter

0111700 ns filter

1000800 ns filter (default setting)

1001900 ns filter

10101000 ns filter

10111100 ns filter

11001200 ns filter

11011300 ns filter

11101400 ns filter

11111500 ns filter

Options

Reserved

DI Filt bit3

DI Filt bit2

DI Filt bit1

DI Filt bit0

Reserved

RL Dir Fwd

RL Dir Rev

RL Trig Edg1

RL Trig Edg0

RL Trig Src1

RL Trig Src0

RL Encdr1Sel

Default00000000000000000000000001100011

Bit 313029282726252423222120191817161514131211109876543210

Table 246B: Edge Selection Settings

Bit 4 3

0 0 Capture position on rising edge

0 1 Capture position on falling edge

1 0 Capture position on both edges

1 1 Disable capture

0 = False

1 = True

Options

Reserved

Disarm Req

Arm Request

Default0000000000000000000000000000000 0

Bit 313029282726252423222120191817161514131211109 8 7 6 5 4 3 2 1 0

0 = False

1 = True