User manual
Index
I–3
eventdriven interrupts. See PIIs
executing, program state, 72
F
fault routines
as a programming feature, 71
blocktransfer data, 818
change from ladder logic, 79
defined, 73
enabling, 78
how to program, 76710
major fault bits, 74
major fault codes, 74
powerup protection, 710
program flow, 71
recover rack fault, 713
setting up, 78
startup, 710
testing, 78
when to use, 71
faulted, program state, 72
faults
detecting major, 711
processorresident local I/O rack
recovery, 712
processorresident local I/O rack, 711
remote I/O rack, 712
remote I/O rack recovery, 712
frontpanel, PLC5/10, 5/12, 5/15, 5/25
processors, 52
functional specification
checking for completeness, 15
content of, 14
definition, 13
detailed analysis, 15, 65
planning application programs, 61
program development, 15
G
grounding, remote I/O systems, 37
guidelines
adaptermodule selection, 24
addressing mode selection, 49
backup system hardware selection, 214
cable selection, 215
chassis selection, 26
complementary I/O addressing, 412
complementary I/O module selection,
213
datatransfer programming guidelines,
821
DH+ link application, 58
I/O point size selection, 22
I/O selection, 21
operator interface selection, 27
placing I/O modules
by electrical characteristics, 41
complementary, 412
power supply selection, 29
proper environment, 31
system design, 12
when to use interrupt routines, 71
when to use SFCs, 62
H
hardware placement, backpanel spacing,
36
I
I/O group, defined, 42
I/O housekeeping, 93
I/O image address, 69
I/O modules
blocktransfer module placement, 42
cable categories, 35
master/expander modules, 23
placement in chassis, 41
select point size, 22
selection guidelines, 21
I/O racks
defined, 43
processorresident local I/O, 410
relationship to chassis size and
addressing mode, 49
remote I/O, 410
immediate I/O, 95
indexed address, 69
indicators, PLC5/10, 5/12, 5/15, 5/25
processors, 52
indirect address, 69
instruction timing, 97, 101
interrupt routines. See STIs, PIIs, fault
routines, power up routines