User manual

Index
I–2
C
cables
DH+ link, 35
planning cabling, 35
processor to programming terminal,
216
raceway layout, 34
remote I/O link, 215
routing conductors, 35
selection, 215
chassis
backplane switches, with adapter
module, A2
dimensions, 32
selection, 26
CMOS RAM memory, 213
complementary I/O
addressing guidelines, 412
blocktransfer module placement, 416
module placement summary, 416
module selection, 213
placing modules
1/2slot, 415
1slot, 414
2slot, 412
completed, program state, 72
component spacing, 32
concepts, data storage, 67
ControlView
features, 27
selection guidelines, 27
D
daisychain connection, DH+ link, 58
data storage, concepts, 67
data table
addressing formats, 69
I/O image address, 69
indexed address, 69
indirect address, 69
logical address, 69
symbolic address, 69
file defaults, 68
data transfer
I/O backplane transfer time, 102
I/O transfer time, 101
design specification
detailed analysis, 65
program development model, 14
designing systems
centralized control, 12
distributed control, 12
guidelines, 12
programdevelopment model, 14, 61
DH+
terminal direct connection, 510
terminal remote connection, 510
DH+ link
application guidelines, 58
connect to Data Highway, 510
connecting devices to link, 58
connectors, 510
daisychain connection, 58, 59
estimating link performance
internal processing time, 56
message destination, 55
size and number of messages, 54
nodes/timing, 54
planning cabling, 35
token passing, 54
transmission rate, 53
trunkline/dropline connection, 58, 59
dimensions
chassis, 32
power supplies, 37
discrete I/O, 84
discretetransfer data
adapter image file, PLC5/12, 5/15, 5/25
processors, 84
adapter mode, 81, 84
defined, 11
determining status of adaptermode
processor, 86
determining status of supervisory
processor, 86
programming considerations, 821
rack 3 default file, 84
scannermode transfer, 816
timing, 95
transferring bits with supervisory
processor, 85
dropline connection, DH+ link, 58
E
EEPROM memory, 213
enclosures, EMI/RFI protection, 34
environment
cooling, 31
enclosures, 34
operating temperature, 31
relative humidity, 31
spacing chassis, 31
storage temperature, 31