User manual

Switch Settings
Chassis Backplane 4-1
Switch Assembly Settings for I/O Chassis Backplane
PLC-5 Processor in the I/O Chassis
Always
Off
Pressed in at bottom
Open (OFF)
Switches
Switch
Switch
Pressed in at top
Closed (ON)
Switches
Last State
Addressing
EEPROM transfer
Processor memory protection
Outputs of this I/O chassis remain in their
last state when a hardware failure occurs.
1
Outputs of this I/O chassis are turned off
when a hardware failure occurs.
1
1
ON
OFF
4
ON
ON
ON ON
ON ON
ON
ON
OFF OFF
OFF
OFF
OFF OFF
OFF
OFF
2-slot
1-slot
1/2-slot
Not allowed
EEPROM memory transfers to processor memory at powerup.
2
EEPROM memory transfers to processor memory if processor memory not valid.
EEPROM memory does not tranfer to processor memory.
3
Processor memory protection disabled.
Processor memory protection enabled.
4
1
Regardless of this switch
setting, outputs are reset when
either of the following occurs:
l
processor detects a
runtime error
l
an I/O chassis backplane
fault occurs
l
you select program or test
mode
l
you set a status file bit to
reset a local rack
2
If an EEPROM module is not
installed, the processor's
PROC LED indicator blinks,
and the processor sets S:11/9,
in the major fault status word.
3
A processor fault occurs if
processor memory is not valid.
4
You cannot clear processor
memory when this switch
is ON.
76
8
5