Mini PLC 2/02, 2/16, 2/17 Processor (cat. no.
Important User Information Because of the variety of uses for this product and because of the differences between solid state products and electromechanical products, those responsible for applying and using this product must satisfy themselves as to the acceptability of each application and use of this product. For more information, refer to publication SGI-1.1 (Safety Guidelines For The Application, Installation and Maintenance of Solid State Control).
Summary of Changes Summary of Changes Summary of Changes This release of the publication contains updated information: For this updated information: See: revised conventions chapter 1 clarified ATTENTION statement about using 1770 XZ batteries chapter 3 revised illustrations showing the new chassis (1771 A1B, A2B, A3B, A3B1, and A4B) chapter 3 chapter 4 chapter 5 chapter 10 minor corrections to the structure for 2 slot addressing chapter 7 appendix E added information about adding Branch St
Table of Contents Summary of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Using This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . What's this User Manual Contains . . . . . . . . . . . . . . . . . . . . . . . . Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ii Table of Contents Step 10 - Connecting to the Field Wiring Arms . . . . . . . . . . . . . . . Step 11 - Connecting Power to the Processor or Power Supply . . . Step 12 - Connecting the Industrial Terminal . . . . . . . . . . . . . . . . Master Control Relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 32 4 37 4 42 4 43 Starting Your Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table of Contents iii Branch Start/End . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Nesting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 9 11 Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . 10 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Override Instructions . .
iv Table of Contents EAF Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Two Operand EAFs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Addition and Subtraction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiplication and Division . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Y to the X . . . . . . . . . . . . . . . . . . . . . .
Table of Contents v Block Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Transfer Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Transfer Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Transfer Write . . . . . . . . . . . . .
vi Table of Contents Selectable Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . 22 1 Chapter Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Selectable Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operational Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 1 22 1 22 3 22 4 Report Generation . . . . . .
Table of Contents vii Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A 1 Processor Comparison Chart . . . . . . . . . . . . . . . . . . . . . . B 1 Number Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C 1 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Decimal Numbering System . . . . . . . . . . . . . . . . . . . . . . . . . . . . Octal Numbering System . . . . . . . . . . . . . . . . . . . .
Chapter 1 Using This Manual Chapter Objectives Read this chapter before you use your processor. Important: This manual is for the series D Mini-PLC-2/02, Mini-PLC-2/16 and Mini-PLC-2/17 processors. See the Series Changes on page 3-2 for the differences with other processor series. Differences This manual describes the Mini-PLC-2/02, Mini-PLC-2/16 and Mini-PLC-2/17 processors. Unless stated otherwise, assume the features or instructions are common to all the processors.
Chapter 1 Using This Manual What's this User Manual Contains This manual is divided into eight sections (Table 1.A): Table 1.
Chapter 1 Using This Manual Conventions A word equals 16 bits; a byte equals 8 bits (1/2 of a word). Words in [ ] denote a key name or symbol. Words in < > denote information that you must provide - for example, an address value. All word addresses are displayed in the octal numbering system. Therefore, references to base 8 are not displayed.
Chapter 1 Using This Manual Figure 1.1 shows the keystrokes to produce a display. Figure 1.1 Illustration Showing Keystroke Conventions Start by positioning your cursor on the words SEQUENCER INPUT. Use the arrow keys to move the cursor. The word display appears in the lower left hand corner of the screen.
Chapter 2 Fundamentals of a Programmable Controller Chapter Objectives In this chapter, you review general fundamentals common to our programmable controllers. This chapter: describes what a programmable controller does describe the functions of a programmable controller describes the four major sections of a programmable controller gives an example of a simple program Traditional Controls You are probably familiar with the traditional methods of machine control.
Chapter 2 Fundamentals of a Programmable Controller Programmable Systems Systems run by programmable controllers operate in much the same way. Programmable controllers can perform many of the functions of traditional controls. Input sensing devices report machine conditions; output devices respond to commands.
Chapter 2 Fundamentals of a Programmable Controller Power Supply Processor (Decision Making) Action Information Input Output • Limit, Proximity, Pressure, Temperature Switches • • • • Push Buttons Logic BCD Analog • • • • • • • Solenoids Motor Starters Indicators Alarms Logic BCD Analog Processor The first section of a programmable controller is the processor. The processor might be called the “brains” of the programmable controller.
Chapter 2 Fundamentals of a Programmable Controller Memory Memory serves three functions: stores information in the data table that the CPU may need stores sets of instructions called a program stores messages Data Table The area of memory where data is controlled and used, is called the data table. The data table is divided into several smaller sections according to the type of information to be remembered.
Chapter 2 Fundamentals of a Programmable Controller I/O Image Tables The input image table reflects the status of the input terminals. The output image table reflects the status of bits controlled by the program. Each image table is divided into a number of smaller units called bits. A bit is the smallest unit of memory. A bit is a tiny electronic circuit that the processor can turn on or off. Bits in the image table are associated with a particular I/O terminal in the input or output section.
Chapter 2 Fundamentals of a Programmable Controller Program Storage Program storage takes up the largest portion of memory. This is where the user’s program is stored. Each program is made up of a set of statements. Each statement does two things: It describes an action to be taken. For instance, it might say, “Energize motor starter number one.” It describes the conditions that must exist in order for the action to take place.
Chapter 2 Fundamentals of a Programmable Controller Message Storage The third area of memory, message storage, begins after the end statement in the user’s program. Two alphanumeric characters can be stored in a word. Messages are entered into memory from either a 1770-T3 terminal or a peripheral device. Messages are displayed on a 1770-T3 terminal or a peripheral device each time a message is required.
Chapter 2 Fundamentals of a Programmable Controller Output Modules The output modules of a programmable controller have four functions: termination indication conditioning isolation Termination The output provides terminals for the field wiring going to the output devices on the machine. Indication The output of most modules provides a visual indication of the selected state of each output device with LED indicators. The output status indicator is on when the output device is energized.
Chapter 2 Fundamentals of a Programmable Controller Control Sequence Let’s look at a simple example to see the sequence of events that take place in controlling a machine with a programmable controller (Figure 2.1). Suppose you are making a part. The motor driven conveyor carries a unit to the work area. The limit switch detects wen the part arrives at the work area. when that happens, we want the conveyor to stop so you can work on the part. Figure 2.
Chapter 2 Fundamentals of a Programmable Controller Scan Sequence On power up, the processor begins the scan sequence (Figure 2.2) with a program pre-scan. This pre-scan is completed as if the entire program lies within an active MCR zone. Next the processor completes the I/O scan. During the I/O scan, data from input modules is transferred to the input image table. Data from output image table is transferred to the output modules. Figure 2.
Chapter 2 Fundamentals of a Programmable Controller Next, the processor scans the program. It does this statement by statement. Each statement is scanned in this way: 1. For each input instruction, the processor checks, or “reads,” the image table to see if the condition has been met. 2. If the set of conditions has been met, the CPU writes a 1 into the bit location in the output image table corresponding to the output terminal to be energized.
Chapter 2 Fundamentals of a Programmable Controller The processor scans the program. Our program states that if (conditions) input bit 02 is on, turn on output 02. If input bit 02 is off then output bit 02 is off. Since the alter condition is not true, the processor turns off output bit 02. When the processor next scans the output image table, it sees the zero in output bit 02 and responds by de-energizing output terminal 02. The action causes the conveyor to stop.
Chapter 3 Hardware Features Chapter Objectives This chapter is a summary of the Mini-PLC-2/02, -2/16, and -2/17 processors. In this chapter, you will read about: major features processor features series changes special features optional equipment Major Features A complete processor system consists of the following major components: a processor I/O chassis power supply as many as 16 I/O modules industrial terminal (cat. no.
Chapter 3 Hardware Features basic instruction set: - relay-like instructions up to 488 timers and counters in the processors program control instructions data manipulation and comparison three-digit math (add, subtract, multiply, and divide) advanced instruction set: - jump instructions and subroutine programming block transfer instructions data-transfer file instructions sequencer instructions bit shift register instructions (bit shifts) - EAF functions: 6-digit add, subtract, multiply and divide, squ
Chapter 3 Hardware Features Table 3.A Additional Features of Mini PLC 2 Processors AA Batt Mini PLC 2/02 Series A Series D Mini PLC 2/16 Series A Series B Rev A or B Series B Rev C or later Series C Series D Mini PLC 2/17 Series A Series B Rev A or B Series B Rev C or later Series C Series D Special Features X X 12.5msec/ K Scan 1/2AA Batt Key Switch Last State 1/2 Slot Addr Bit Shift 7.
Chapter 3 Hardware Features Figure 3.1 Without a Power Supply PROC indicator lights green for normal operation and red for a processor fault. Off indicates that you are in Program Mode or a possible run time error. You reset this LED by cycling power. PROC F A U L T R U N BATT (Red) lights when battery should be replaced.
Chapter 3 Hardware Features Figure 3.2 With a Power Supply Green LED lights for normal power supply operation. Port allows you to parallel the processor power supply with another power supply in the I/O chassis. PROC indicator lights green for normal operation and red for a processor fault. Off indicates that you are in Program Mode or a possible run time error. You reset this LED by cycling power.
Chapter 3 Hardware Features PROG – You can enter and edit your program from the 1770-T3 industrial terminal. User program and I/O are not scanned when the switch is in this position and outputs are disabled. You cannot change to another mode of operation with the 1770-T3 terminal when the switch is in this position. R/P – When your key switch is in this position, the processor can be programmed for any one of three modes of operation.
Chapter 3 Hardware Features ATTENTION: Use only an Allen-Bradley authorized 1770-XZ 3.6V “1/2AA” size (Tadiran TL 2150 Type 1/2AA/s lithium thionyl chloride battery with pressure contacts. Using an unauthorized battery could result in sub-standard performance of your processor. See chapter 4 for details about battery installation and disposal.
Chapter 3 Hardware Features We recommend that you use a series C, revision C or later 1770-T3 terminal; earlier versions do not provide full functionality. You can use a 1770-T1 or 1770-T2 industrial terminal to program the processors; however, only instructions supported by these terminals can be programmed. ATTENTION: Programs entered using a 1770-T3 Industrial Terminal must not be edited with either a 1770-T1 or a 1770-T2 industrial terminal.
Chapter 3 Hardware Features 1. Connect one end of the PLC-2 Program Panel Interconnect Cable (cat. no. 1772-TC) to CHANNEL A at the rear of the industrial terminal. 2. Connect the other end of the cable to the socket labeled INTFC at the front of the processor. 3. Place the PLC-2 Family Keytop Overlay (cat. no. 1770-KFA) (Figure 3.5) onto the keyboard. Figure 3.
Chapter 3 Hardware Features 8. After a short while the following display appears. DIAGNOSTICS PASSED MODE SELECTION KEYBOARD MODULE 1770-FD C SERIES B/H INSERT KEYTOP OVERLAY: MODE: 10 = PLC 11 = PLC-2 1770-KBA 1770-KCB 12 = ALPHANUMERIC 1770-KAA FOR USE WITH THE FOLLOWING PROCESSORS: PLC MINI-PLC-2,PLC-2 PLC-2/02 PLC-2/05,PLC-2/15 PLC-2/16,PLC-2/17 PLC-2/20(PL1) PLC-2/20(LP2) PLC-2/30 SELECT DESIRED MODE? 9. Select the PLC-2 mode by pressing [1] [1] on the 1771-T3 terminal.
Chapter 3 Hardware Features Some keys have two symbols occupying one key (Figure 3.5). To display the top section of each key, press your shift key before the desired symbol. For example: To display: Press individually: 7 7 A [Shift] A Data Monitor Functions –– You can display on a CRT and print directly to a data terminal – binary, hexadecimal, and ASCII data monitor functions with the keystrokes in Table 21.B.
Chapter 3 Hardware Features This Power Supply: 1771 P3 Receives Power from: an external 120V ac power source And Supplies this Power to the Chassis: +5V dc 1771 P4 1771 P5 an external 24V dc power source 1771 P7 an external 120V or 220V ac power source ATTENTION: Do not parallel a 1771-P5 power supply and a 1772-LWP, -LXP, or -LZP processor because of power-up and power-down timing differences.
Chapter 3 Hardware Features Transferring a Program into the EEPROM (Burning the EEPROM) 1. Put the processor in the remote program or program mode of operation. 2. Place the keyswitch into the MEM STORE position, then to PROG, and then back to MEM STORE within one second until the green PROC RUN indicator turns ON. This indicator turns OFF after a few seconds. If the PROC RUN indicator does not turn green (or if it turns red), the program was not stored.
Chapter 4 Installing Your Programmable Controller Chapter Objectives This chapter discusses the location and methods of installing your processor. When you have finished, you should be able to: determine where to locate your processor system install your processor system Related Hardware Table 4.A lists the hardware needed to install your processor system. Table 4.
Chapter 4 Installing Your Programmable Controller Planning Your Processor System A well-planned layout is essential for the installation of your processor. You should consider the following factors: location environment mechanical protection conductor categories raceway layout power distribution surge suppression Location Determining the proper location should be your primary concern.
Chapter 4 Installing Your Programmable Controller Mechanical Protection You provide the enclosure for your processor system. This enclosure is the primary means of protecting your processor system from atmospheric contaminants such as oil, moisture, dust, corrosive materials, or other harmful substances. We suggest that you use an enclosure that conforms to the National Electrical Manufacturer’s Association standard (NEMA Standard Publication No. ICS 6).
Chapter 4 Installing Your Programmable Controller Category-2 Conductors Category-2 conductors are, in general, low-power conductors that are, therefore, less tolerant of noise than category-1 conductors and should also generate less noise. They include: serial communication cables — They connect between processors or to remote I/O adapter modules, programming terminals, computers, or data terminals.
Chapter 4 Installing Your Programmable Controller All category-2 conductors must be properly shielded, where applicable, and routed in a separate raceway. If a category-2 conductor must cross power feed lines, it should do so at right angles. Route category-2 conductors at least 1 foot from 120V ac power lines, 2 feet from 240V ac power lines, and 3 feet from 480V ac power lines.
Chapter 4 Installing Your Programmable Controller To determine the required rating of the transformer, add the external-transformer rating for the power supply and all other power requirements (input circuits, output circuits). The power requirements must take into consideration the surge currents of devices controlled by the processor. Choose a transformer with the closest standard transformer rating above the calculated requirements.
Chapter 4 Installing Your Programmable Controller Figure 4.
Chapter 4 Installing Your Programmable Controller Figure 4.
Chapter 4 Installing Your Programmable Controller Second Transformer Allen-Bradley power supplies have circuits which suppress electromagnetic interference from other equipment. However, it is useful to isolate output circuits from power supplies and input circuits to guard against output transients from being induced into inputs and power supplies. Therefore, in many applications, power is provided to the input circuits and power supplies through a second transformer as in Figure 4.3.
Chapter 4 Installing Your Programmable Controller Figure 4.
Chapter 4 Installing Your Programmable Controller Ground loops may introduce objectionable ground currents causing faulty operation of the programmable controller. If multiple grounding connections cause faulty operation, refer to Article 250-21 of the National Electrical Code for recommended methods of reducing the objectionable ground current.
Chapter 4 Installing Your Programmable Controller Figure 4.4 Typical Suppression Networks Suppressor for 3 phase apparatus Suppressor for small apparatus 230V/460V ac 120V ac Allen Bradley Catalog No. 1691 N2 3 phase motor Electro Cube Inc. Part No. RG 1676 13 Suppressor for large apparatus Suppressor for dc relays + – 120V ac V dc Electro Cube Inc. Part No. RG 1676 14 12057-I Table 4.
Chapter 4 Installing Your Programmable Controller How to Install Your Processor This section provides general installation guidelines. The input and output devices that control your manufacturing operations determine the specifics of your installation. Figure 4.5 shows the location of your major pieces of hardware. Figure 4.5 The Locations of the Major Pieces of Hardware Mini PLC 2/02 processor (cat. no. 1772 LZ) or Mini PLC 2/16 processor (cat. no. 1772 LX) or Mini PLC 2/17 processor (cat. no.
Chapter 4 Installing Your Programmable Controller Installing your processor involves twelve steps. Perform these steps in order. 1. Mounting the backpanel (page 4-14) 2. Mounting and grounding components on the backpanel (page 4-15) 3. Setting the switches within the switch group assembly (page 4-22) 4. Installing keying bands and field wiring arms (page 4-24) 5. Installing I/O modules (page 4-26) 6. Installing backup battery (page 4-28) 7. Installing the EEPROM memory module (page 4-29) 8.
Chapter 4 Installing Your Programmable Controller Figure 4.
Chapter 4 Installing Your Programmable Controller Figure 4.7 Programmable Controller Components Must Not be Spaced Less Than These Minimums 50.8mm (2) 101.6mm (4) Mini PLC 2 Processor 101.6mm (4) Wiring Duct 152.4mm (6) 50.8mm (2) 12059 Figure 4.8 You Need These Dimensions to Mount an I/O Chassis (cat.no. 1771 A1B, A2B, A3B, A4B) use .25 diameter mounting bolts (4 places) 315mm (12.41) 594mm (23.4) 340mm (13.4) 476mm (18.4) 213mm (8.
Chapter 4 Installing Your Programmable Controller Before grounding your processor system, consult the following sources of information: National Electrical Code, published by the National Fire Protection Association of Boston, Massachusetts local codes and ordinances Mounting Processor Components After planning your layout, you can begin mounting the chassis. In mounting each chassis: Make sure each chassis lies flat.
Chapter 4 Installing Your Programmable Controller If the mounting brackets of a chassis do not lay flat before the nuts are tightened, use additional washers as shims so that the chassis will not be warped by tightening the nuts. Warping a chassis could damage the backplane and cause poor connections. Make good electrical connection between each chassis, the backpanel, and the enclosure through each mounting bolt or stud.
Chapter 4 Installing Your Programmable Controller Figure 4.10 Ground Bus Connections ground bus mounting ground bus ground lug grounding electrode conductor to grounding electrode system equipment grounding conductors 10309-I Figure 4.
Chapter 4 Installing Your Programmable Controller If the power supply has its own groundable chassis, do not connect the GND terminal of the power supply. However, when you connect power to a power supply without a groundable chassis of its own (such as an ac-input power-supply module), you must also use 12 AWG copper wire to connect its GND terminal to the ground stud or mounting bolt connected to the ground bus (Figure 4.12).
Chapter 4 Installing Your Programmable Controller Figure 4.
Chapter 4 Installing Your Programmable Controller Step 3 - Setting the Switches within the Switch Group Assembly Figure 4.13 Locating Switch Group Assembly on the Backplane of an I/O Chassis Switch Group Assembly Table 4.C and Table 4.D explain how each switch is used by the processor. Switches 2 and 3 are not used. Use a ball-point pen to set each switch. Do not use a pencil because the tip can break off and jam the switch.
Chapter 4 Installing Your Programmable Controller Table 4.
Chapter 4 Installing Your Programmable Controller Table 4.D Set Switches 6 and 7 If And Then Without and EEPROM installed in your processor Switch 6 is OFF Switch 7 may be either ON or OFF With a battery installed and a program stored in RAM memory, your processor powers up in the mode identified by the position of the mode select switch. If the mode select switch is in the RP position, the processor will power up in the remote program mode.
Chapter 4 Installing Your Programmable Controller Figure 4.14 Place the Keying Bands on the Backplane of the I/O Chassis 2 4 6 8 10 12 14 I/O chassis backplane connector 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 use these numbers as a guide ÉÉÉÉ keying bands (cat. no. 1777 RK) ÉÉÉÉ 10313-I Use the numbers to the right of the backplane socket as a guide when positioning the keying bands. See the installation instructions for the keying position of each I/O module.
Chapter 4 Installing Your Programmable Controller Figure 4.15 Snap the Field Wiring Arm onto the I/O Chassis wiring arm horizontal bar C shaped bracket remove install Step 5 - Installing I/O Modules 4-26 Insert each I/O module into its properly keyed slot by sliding it onto the plastic tracks of the I/O chassis (Figure 4.16). Snap the module locking latch over the I/O module.
Chapter 4 Installing Your Programmable Controller Figure 4.16 Place Each I/O Module into its Corresponding Keyed Slot in the I/O Chassis locking bar I/O module card guides corresponding keyed slot 20213 ATTENTION: Do not force and I/O module into a backplane connector. Forcing an I/O module can damage the backplane connector or the I/O module. Calculate the total current requirement for all installed modules to ensure that the sum does not exceed the limit of the I/O chassis’ power supply.
Chapter 4 Installing Your Programmable Controller ATTENTION: We recommend that you use the following series of modules when using slot-mounted power supplies: Isolated ac (120V) Output Module (1711-OD) series C Isolated ac (220V) Output Module (1771-OR) series B Contact Output Module (1771-OYL, -OZL, or -OW) These modules are compatible with the “soft-start” feature of slot-mounted power supplies.
Chapter 4 Installing Your Programmable Controller 4. Replace the battery cover. 5. Tighten the screw. How to Dispose of the Battery Batteries should be collected for disposal in a manner to prevent short circuiting, compacting, or destruction of case integrity and hermetic seal. ATTENTION: Do not incinerate or dispose of lithium batteries in general trash collection. Explosion or violent rupture is possible.
Chapter 4 Installing Your Programmable Controller 6. Place the processor on a clean flat surface with the bottom of the module facing you. 7. Position the EEPROM memory module in the memory module slot with its label facing upward. Insert and press firmly for proper connection (Figure 4.17). Figure 4.17 Inserting the EEPROM Memory Module into the Processor 10316-I 8. Slide the processor into the I/O chassis. 9. Secure the I/O chassis latches. 10. Connect the power cable. 11.
Chapter 4 Installing Your Programmable Controller Step 8 - Installing the Processor Slide your processor into the leftmost slot of the I/O chassis (Figure 4.18) Figure 4.18 Place the Processor in the Left Most Slot of the I/O Chassis locking bar Mini PLC 2/17 processor left most slot 20215 ATTENTION: Do not place your processor in the I/O chassis without keying bands. Short circuits can result from misalignment.
Chapter 4 Installing Your Programmable Controller Step 10 - Connecting to the Field Wiring Arms Your I/O devices connect to the I/O module’s field wiring arm. Every I/O module must be properly wired and every I/O connection must be made at the proper field wiring arm terminal. Refer to the specific I/O module publication for connection diagrams. We recommend using copper wire for these connections. 1. Grasp the lug and open the terminal cover to the right. lug 2.
Chapter 4 Installing Your Programmable Controller For a single-conductor wire or multi-conductor cable, perform the following steps. For a multi-conductor shielded cable, proceed to the next section (page 4-34). Single Conductor Wire or Multi Conductor Cable 1. Strip about 3/8 inch insulation to expose the end of the wire Strip about 3/8 inch insulation to expose the wire 2. Loosen a terminal screw and place the wire under the pressure plate of the terminal. 10604 I 3. Secure the terminal screw.
Chapter 4 Installing Your Programmable Controller 4. Repeat steps 2 and 3 until you wire the appropriate I/O devices to the field wiring arm. 10618 I 5. Connect the drain wire to ground. 6. Gather all wires and neatly bundle them using tie wraps. 7. Label all wires with a 5-digit I/O address code at each wire connection. Chapter 7 describes I/O addressing.
Chapter 4 Installing Your Programmable Controller Multi-conductor shielded cable is Belden type 8761. It consists of twisted pairs of conductor wires wrapped in two layers of shielding. Our wiring procedure shows one pair of conductor wires. The required number of I/O terminals determines the number of conductor wires needed within the cable for your application. Figure 4.19 shows each component making up this cable. Figure 4.
Chapter 4 Installing Your Programmable Controller 3. Cut the insulation and filler cords. insulation filler rods conductor wires drain wire 4. Fold the drain wire back to separate it from the conductor wire. conductor wires drain wire 5. Strip about 3/8 inch insulation to expose the end of the wire. drain wire exposed wire 6. insulation Loosen a terminal screw and place the wire under the pressure plate of the terminal screw. 10604 I 7. 4-36 Secure the terminal screw.
Chapter 4 Installing Your Programmable Controller 8. Repeat steps 6 and 7 until you wire the appropriate I/O devices to the field wiring arm. 9. Connect the drain wire to ground. 10. Gather all of your wires and neatly bundle them using tie wraps. 11. Label all of your wires with a 5-digit I/O address code at each wire connection. Chapter 7 describes I/O addressing. 12. Make sure that the field wiring arm pivots freely from vertical to horizontal. 13. Replace the field wiring arm’s terminal cover. 14.
Chapter 4 Installing Your Programmable Controller Table 4.E Processor Operate and Shutdown Voltages On this system If the line voltage 120V 220V The processor should drops below 92V 184V shutdown increases to 97V 194V start to operate You provide the appropriate power cable to connect a processor with a power supply (1771-P3, -P4, -P5 power supplies) to its terminal strip. A processor without a power supply receives its power from the backplane of the I/O chassis.
Chapter 4 Installing Your Programmable Controller Figure 4.20 Top View of the ac Power Plug place tool here insert wire here 17229 Connecting a Power Supply To connect the wires to the 1771-P3, -P4, or -P5 power supplies do the following: 1. Strip 3/8 inch insulation from the end of the wire. Figure 4.21 shows an ac powered 1771-P3 or -P4 power supply. Figure 4.22 shows a dc powered 1771-P5 power supply. 2. Loosen each terminal screw and place the appropriate wire under it (Figure 4.21).
Chapter 4 Installing Your Programmable Controller Figure 4.21 Connect Your Power Cable to the ac Power Supply's Terminal Strip 1.5A 125V SLOW BLOW 120V AC L1 N GN power wire connects to L1 neutral wire connects to N ground bus connects to GND 10321-I Figure 4.
Chapter 4 Installing Your Programmable Controller Figure 4.23 Connecting More Than One Power Supply power supply paralleling cable (cat. no. 1771 CT) line 120V neutral ac equipment grounding conductor Ground Bus When wiring a 1771 P3 module, connect GND to the ground stud. No. 14 AWG is recommended. 13496 To easily remove your I/O modules that are between the two power supplies, place the paralleling cable across the top of the I/O chassis (Figure 4.23).
Chapter 4 Installing Your Programmable Controller Setting the Input Voltage Selector Switch The processors can operate on 120 or 220 V ac. Select the required operating voltage by setting the Input Voltage Selector Switch at the rear of the processor (Figure 4.24). The processor is shipped set for 120V operation. Figure 4.
Chapter 4 Installing Your Programmable Controller Master Control Relay 1. Turn the power switch on the front of the 1770-T3 terminal to the OFF position. 2. Plug the ac power cord into the 1770-T3 terminal. 3. If using a processor with a power supply, plug the ac power cord into the ac power source. 4. Connect one end of the 1772-TC Interconnect Cable to CHANNEL A at the back of the industrial terminal. 5.
Chapter 5 Starting Your Processor Chapter Objectives This chapter covers the initial start-up of your processor system. It explains how to: document the processor check the operation of your processor before supplying power understand hardware addressing start the processor system test the input and output devices Verify Your System's Addresses Verify your I/O devices’ and field wiring arms’ wire numbers using the Connection Diagram Addressing Worksheet (Figure 5.1).
5-2 PROJECT NAME (16-point modules) DESIGNER DATE PAGE Bulletin 1771 I/O chassis CONNECTION DIAGRAM ADDRESSING WORKSHEET OF Chapter 5 Starting Your Processor Figure 5.
Chapter 5 Starting Your Processor Status Indicators for I/O Modules Most I/O modules have status indicators on the front panel. Each indicator corresponds to a terminal on the I/O module’s field wiring arm (Figure 5.2). When status indicators on input modules light, power is present at the input terminal. When status indicators on 8-point output modules light, power is present at the output terminal.
Chapter 5 Starting Your Processor Addressing Your Hardware You must properly address your hardware so that it relates to your ladder diagram program. In the ladder diagram program, the input or output instruction address is associated with a particular I/O module terminal and is identified by a 5-digit address (Figure 5.3). Addressing links a hardware terminal to a data table location (input), and links a data table location to a terminal (output). Figure 5.
Chapter 5 Starting Your Processor In Figure 5.3, reading from left to right, the: first number denotes the type of module: - 0 output - 1 input second number denotes the I/O rack: - In 2-slot addressing, the rack number is always 1. - In 1-slot addressing, the rack number is either 1 or 2. - In 1/2-slot addressing the rack number may be 1, 2, 3, or 4. third number denotes an I/O group (0 to 7).
Chapter 5 Starting Your Processor Using 8-Point I/O Modules I/O modules generally provide eight input terminals or eight output terminals. Figure 5.4 illustrates the 2-slot I/O group concept with two 8-point input modules. Figure 5.5 illustrates the 2-slot I/O group concept with an 8-point input and an 8-point output module. Figure 5.
Chapter 5 Starting Your Processor Figure 5.
Chapter 5 Starting Your Processor Figure 5.6 Illustration of 2 Slot Addressing with 16 Point Input and Output Modules 2 slot I/O group input terminals output terminals 00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 16 point input and output modules use two words (one input, one output) of the image table.
Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 2-slot addressing, each pair of slots (one I/O group) is assigned to the corresponding pair of words in the input and output image tables. You assign one I/O rack number to eight I/O groups (Figure 5.7). Figure 5.
Chapter 5 Starting Your Processor 1 Slot Addressing The processor addresses one I/O module slot as one I/O group. Each 1-slot I/O group is represented by a word in the input image table and a word in the output image table. You have 16 input bits and 16 output bits available for each slot. This lets you use any mix of 8- and 16-point I/O modules in the I/O chassis in any order. 32-point modules must be used in complementary arrangements.
Chapter 5 Starting Your Processor Figure 5.8 Illustration of 1 Slot Addressing with 16 Point I/O Modules 1 slot I/O group 1 slot I/O group input terminals output terminals 00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 OR Output image table word corresponding to the I/O group. 17 16 15 1 4 03 02 01 00 unused Input image table word corresponding to the I/O group. 17 16 15 00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 1 4 03 02 01 00 Output image table word corresponding to the I/O group.
Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 1-slot addressing, each slot is an I/O group. You still assign one I/O rack number to eight I/O groups; therefore, in a 16-slot I/O chassis you now have two I/O racks (Figure 5.9). Figure 5.9 Assigning I/O Rack Numbers with 1 Slot Addressing I/O group number assigned I/O rack number 1 01 23 45 assigned I/O rack number 2 67 01 23 1771 A4B I/O chassis using 1 slot addressing. 45 67 13077 In Figure 5.
Chapter 5 Starting Your Processor Figure 5.10 Example of 1 Slot Addressing I/O group number rack 1 01 23 45 67 01 23 45 67 I/O group 1 address 121 I/O group 1 address 111 input rack rack 2 I/O group 13499 Using 32-Point I/O Modules 32-point I/O modules provide 32 input or 32 output terminals. 32-point I/O modules use two full words in the input or output image table.
Chapter 5 Starting Your Processor 1/2 Slot Addressing When you select 1/2-slot addressing, the processor addresses one-half of an I/O module slot as one I/O group. The physical address of each I/O slot corresponds to two input and two output image table words. The type of module you install (8, 16 or 32 I/O points) determines the number of bits in these words that are used.
Chapter 5 Starting Your Processor Figure 5.
Chapter 5 Starting Your Processor Assigning I/O Rack Numbers When you select 1/2-slot addressing, each slot corresponds to two I/O groups. You still assign one rack number to eight groups; however, with 1/2-slot addressing this requires only four slots. Thus, in a 16-slot chassis, you now can have four I/O racks (Figure 5.12). Figure 5.
Chapter 5 Starting Your Processor Figure 5.13 illustrates addressing 4 modules, each with the same I/O group number, but in the four different racks of a single I/O chassis. Figure 5.
Chapter 5 Starting Your Processor Before You Supply AC Power ATTENTION: Unexpected machine motion during system start-up can damage equipment and injure personnel. Disconnect any device that might cause machine motion to occur when it is energized. Before you supply ac power to your processor do the following: 1. Measure the ac line voltage and make sure it corresponds to the system power supply. Verify the L1, L2 and Chassis Gnd connections (L1 = ac high, L2 = ac return). 2.
Chapter 5 Starting Your Processor Using Pushbuttons ATTENTION: Use only trained personnel to conduct this test. Have a trained person at appropriate emergency stop switches to de-energize output devices that could cause hazardous operation. To use a pushbutton to test your output devices, do the following: 1. Connect a normally-open/momentary-close pushbutton switch as an input device to an input module. 2. Connect the industrial terminal to your processor. (See chapter 4.) 3.
Chapter 5 Starting Your Processor Using the 1771 SIM Module The Switch/Indicator module is compatible with any 1771 I/O chassis. It has 8 switches to simulate 8 inputs and it has 8 LED’s to indicate when an addressed output is active. It requires no external power. See publication 1771-2.106 for more information. Testing Input Devices ATTENTION: Use only trained personnel to conduct this test.
Chapter 5 Starting Your Processor 5. If the instruction does not intensify, then: repeat the test procedure check your input module call your Allen-Bradley sales engineer or distributor 6. If the indicator does not light, check: power source for the input device wiring from the input device connection to the field wiring arm’s terminal input device verify the address of the input device input terminal Using The 1771 SIM The Switch/Indicator module is compatible with any 1771 I/O chassis.
Chapter 6 Maintaining and Troubleshooting Your Processor Chapter Objectives This chapter describes techniques of maintaining and troubleshooting your processor. When you have finished, you should be: aware of items requiring maintenance able to troubleshoot your processor. General The processor is designed to minimize the need for maintenance and troubleshooting procedures. Troubleshooting does not usually require special test equipment or programming techniques.
Chapter 6 Maintaining and Troubleshooting Your Processor The most likely source of a problem is your hardware. This includes the wiring, I/O devices, I/O power source, and system power. You should be able to trace the source of the problem if you observe I/O device behavior and processor indicators. The following sections deal with troubleshooting problems as they relate to your processor components. Observe all attentions.
Chapter 6 Maintaining and Troubleshooting Your Processor Table 6.F The PROC Indicating LED Will Help You Troubleshoot Your Processor If the PROC indicator Green And the processor is in the Run mode operating normally • program is executing • outputs are enabled. You should No action required is in MEM STORE mode and EEPROM memory module is being programmed. The indicator will be ON for a few seconds and then then turn OFF.
7 Chapter Memory Organization Chapter Objectives This chapter discusses: hardware and its relationship to your program memory and its components This chapter provides detailed concepts of the memory’s organization and its structure. Understanding these concepts aids you in programming your processor.
Chapter 7 Memory Organization Memory Areas Memory is divided into three major areas: data table, user program, and message storage area. These areas store input status, output status, and program instructions and messages. Data Table The first part of memory is the data table (Figure 7.1). The processors are factory configured for 128 words. Figure 7.2 shows memory structure with a factory configured data table. The specific concepts throughout this publication refer to a factory configured data table.
Chapter 7 Memory Organization Figure 7.2 Data Table Factory Configured for 2 Slot Addressing Total Decimal Words 8 Decimal Words Per Area 8 Word Address Processor Work Area No. 1 Output Image Table 16 8 64 72 8 40 8 Reserved 2 Timer/Counter Accumulated Values (AC) (or Bit/Word Storage) Processor Work Area No.
Chapter 7 Memory Organization Figure 7.3 Data Table Configured for 1 Slot Addressing Total Decimal Words Decimal Words Per Area 8 8 Word Address Bit Address 000 00 Processor Work Area No. 1 007 17 010 00 Output Image Table Rack 1 6 16 8 017 17 020 00 Output Image Table Rack 2 1 1 24 8 Reserved 2 7 64 40 Timer Counter Accumulated Values (AC) (or Bit Word Storage) 3 72 8 Processor Work Area No.
Chapter 7 Memory Organization Figure 7.4 Data Table Configured for 1/2 Slot Addressing Word Address Total Decimal Words Decimal Words Per Area 8 8 Processor Work Area No. 1 16 8 Output Image Table Rack 1 24 8 Output Image Table Rack 2 1 Reserved 2 6 32 8 Output Image Table Rack 3 40 8 64 24 Output Image Table Rack 4 Timer/Counter Accumulated Values (AC) 3 (or Bit/Word Storage) 72 8 Processor Work Area No.
Chapter 7 Memory Organization Data Table Areas The following areas make up the data table. They are: processor work area no. 1 output image table bit/word storage (020-027) timer/counter accumulated values and internal storage processor work area no. 2 input image table bit/word storage (120-127) timer/counter preset values and internal storage Chapter 2 describes the input and output image tables. The following sections describe the remaining areas. Processor Work Areas There are two processor work areas.
Chapter 7 Memory Organization Adjusting the Data Table You can adjust the size of a data table at any time during programming or editing. Using the 1770-T3 terminal, you can expand the data table in steps of two words from 48 words to 256 words and then in steps of 128 words to 1,920 words for a Mini-PLC-2/02, 3,968 words for a Mini-PLC-2/16 or 7,808 words for a Mini-PLC-2/17. You can expand the data table to accommodate the full I/O capacity of the processor.
Chapter 7 Memory Organization Table 7.
Chapter 7 Memory Organization Three things happen to the display. The cursor returns to the NUMBER OF 128–WORD D.T. BLOCKS. NUMBER OF T/C changes to 022. DATA TABLE SIZE becomes 92. Expanding the Data Table Between 130 and 256 Words 02 To expand your data table to any size between 130 and 256 words, do this: DATA TABLE CONFIGURATION NUMBER OF 128-WORD D. T.
Chapter 7 Memory Organization Table 7.B The Data Table Sizes Between 384 and 7,808 words Enter Data Table Size Enter Data Table Size The Mini PLC 2/02 has this number of data table blocks. 3 4 5 6 7 8 9 384 512 640 768 896 1024 1152 10 11 12 13 14 15 1280 1408 1536 1664 1792 1920 The Mini PLC 2/16 has this additional number of data table blocks.
Chapter 7 Memory Organization User Program The second major part of memory is the user program (Figure 7.1). It is divided into two areas: This Area: Stores this: main program The program is a group of ladder diagram instructions that control an application that guides the processor. These instructions can examine or change the status of bits in the memory of the processor. The status of these bits determines the operation of your output devices.
Chapter 7 Memory Organization Examining the Memory If you want to examine the memory layout: SEARCH The word SEARCH appears in the lower left hand corner of the screen.
Chapter 8 Scan Theory Chapter Objectives In this chapter you will read about: scan function scan time Scan Function The processor controls the status of output devices or instructions in accordance with program logic. Every instruction in your program requires execution time. These times vary greatly depending upon the instruction, the amount of data to be operated on, and whether the instruction is true or false. As a review from chapter 2, there are two types of scans (Figure 8.
Chapter 8 Scan Theory Figure 8.1 The Processor Scans With This Sequence Output Image Table Output Terminals Copy output image table status into output terminal circuits. I/O Scan Input Image Table Input Terminals Copy input terminal status into input image table ( ) Program Statement Program Scan Execute each program rung in sequence, writing into bits in the data table, including the output image table. 10351-I Upon power-up, the processor begins the scan sequence with a program pre-scan.
Chapter 8 Scan Theory Next, the processor scans the program statement by statement: 1. For each condition, the processor checks, or “reads,” the image table to see if the condition has been met. 2. If the set of conditions has been met, the processor writes a one into the bit location in the output image table corresponding to the output terminal to be energized.
Chapter 8 Scan Theory Add the execution values for each instruction by using Table 8.A. The sum of these values added to the I/O scan time is the average scan time. Table 8.A These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True average µ sec. False average µ sec.
Chapter 8 Scan Theory Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True average µ sec.
Chapter 8 Scan Theory Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True average µ sec. False average µ sec.
Chapter 8 Scan Theory Table 8.A (continued) These Are the Approximate Execution Time Per Scan (in average microseconds) and Words Per Scan for Each Instruction Instruction Instruction Name Symbol True average µ sec. False average µ sec. Words Per Instruction These EAF instructions are features of the Mini PLC 2/17 only.
Chapter 8 Scan Theory Here is an explanation of the rungs in Figure 8.2: Rung 1 - The count increments its accumulated value each time this rung is true. Rung 2 - This rung enables the counter to increment on the next scan. If we did not have this rung, the counter would always be true and it would not increment. Remember: Counters increment only on false to true transitions. Rung 3 - The timer times in tenths of seconds when we are counting. This value is displayed on the industrial terminal screen.
Chapter 9 Relay Like Instructions Chapter Objectives This chapter describes the relay-like instructions. This chapter shows how to: define the conditions needed before the action takes place enter, edit or remove relay-like instructions Programming Logic A program is a list of instructions that the processor executes. These instructions can examine or change the status of bits in the data table of the processor. The status of these bits can determine the operation of other instructions.
Chapter 9 Relay Like Instructions Here, a series of conditions (C2, C2, C3) must be true before action A is performed. C1 = Input switch 1. When the switch is on, this condition is true. This switch turns on a conveyer belt. C2 = Input sensor 1. When the sensor is off, this condition is true. This sensor detects if the temperature in the factory is below 40oC. C3 = Input sensor 2. When the sensor is on, this condition is true. This sensor detects the presence of a part of the conveyer belt.
Chapter 9 Relay Like Instructions Addresses The processor scans the status of inputs and controls output devices. It does not go to the input or output terminals to see if outputs are on or off. Rather, it checks the status of the input and output devices by scanning corresponding bits in the input and output image area of the data table. The processor uses addresses to refer to words and bits in the data table. For addressing purposes, I/O modules in a given I/O rack are organized into “module groups.
Chapter 9 Relay Like Instructions Examine On and Examine Off The Examine On (–] [–) and Examine Off (–]/[–) instructions tell the processor to examine a bit at a specified data table location. 012 112 04 Bit Examining Examine On 13 012 112 14 05 Bit Examining Examine Off This Instruction: Becomes: When the Corresponding Bit Is: EXAMINE ON true set false reset true reset false set EXAMINE OFF Keystrokes Enter an Examine On or Examine Off instruction by performing the following steps. 1.
Chapter 9 Relay Like Instructions Editing a Partially Completed or a Completed Rung Edit an Examine On or Examine Off by performing the following steps. If you are editing a completed rung, proceed to step 1. If you are editing a partially completed rung, enter the next instruction and proceed to step 1. Bit Controlling 1. Position the cursor over the Examine On or Examine Off instruction you want to edit. 2. Press either –] [– or –]/[– any other appropriate instruction key. 3. Enter
.Chapter 9 Relay Like Instructions Editing in a Completed Rung Edit the Output Energize instruction by performing the following steps. However, you cannot remove an output instruction. Output Latch/Unlatch 1. Position the cursor over the Output Energize instruction you want to change. 2. Press –( )– or any other appropriate output instruction key. 3. Enter
. The Output Latch –(L)– instruction tells the processor to latch and set a specified data table bit when the rung is true.Chapter 9 Relay Like Instructions Keystrokes Enter an Output Latch or Unlatch instruction by performing the following steps. 1. Press either –(L)– or –(U)– as required. 2. Enter
. Important: You can initially condition the latch or unlatch instruction to on or off by positioning the cursor over the Output Latch or Output Unlatch instruction and pressing 1 or 0, respectively. Editing in a Completed Rung Edit an Output Latch or Unlatch instruction by performing the following steps. 1.Chapter 9 Relay Like Instructions Branching Instructions Use branching instructions when you want several parallel sets of conditions to make an output action possible. A program with branching says, “If this set of conditions is true, or if that set of conditions is true, perform the following action.” Branching allows two or more paths to reach the same output destination. False C1 A True C2 Here two conditions are parallel.
Chapter 9 Relay Like Instructions Branch Start/End A Branch Start instruction begins each parallel logic branch of a rung. It allows more than one combination of input conditions to energize an output device. It is programmed before the first instruction of each parallel branch. A Branch End instruction completes a set of parallel branches. Keystrokes Enter a Branch Start or Branch End instruction by pressing either: . . or . .
Chapter 9 Relay Like Instructions Important: Once you press the Branch End instruction, the statement BRANCH END OMITTED disappears. While inserting a Branch Start instruction to an existing rung during online programming, the actual output status (on or off) may not be the logically expected state of the rung. This condition exists until you enter the Branch End instruction and complete the rung. To avoid this condition, do the following: 1.
Chapter 9 Relay Like Instructions Nesting The following rung shows a nested branch. Creating nested branches is not possible because the Branch End instruction completes a branch group. But the above rung shows a single branch group with two branch end instruction. Above, the Examine On instruction with the address 11012 is actually a branch group within a branch group.
Chapter 10 Program Control Instructions Chapter Objectives This chapter describes these program control instructions: output override immediate I/O update Introduction Some applications need programming techniques designed to override a group of non-retentive outputs or update I/O ahead of the usual I/O scan time. The program control instructions satisfy this need.
Chapter 10 Program Control Instruction A Master Control Reset (MCR) establishes a zone in the user program in which all non-retentive outputs are turned off simultaneously. Important: Retentive instructions (-(U)-, -(L)-, -(RTO)-) should not be placed within an MCR zone, because the MCR zone maintains retentive instructions in the last active state when the start fence goes false.
Chapter 10 Program Control Instructions Figure 10.
Chapter 10 Program Control Instruction Figure 10.2 Zone Control Reset 010 011 012 00 010 00 00 ZCL 010 00 00 015 017 011 00 016 00 00 021 012 00 022 00 00 013 00 024 00 025 00 00 00 020 023 00 026 014 00 00 End Fence ZCL If the start fence becomes: True - Each rung condition controls their output instruction. False - All output instructions within the zone are left in their last state. ATTENTION: MCR or ZCL zones must not overlap or nest.
Chapter 10 Program Control Instructions Editing in a Completed Rung Edit these instructions by performing the following steps: Immediate I/O Update Instructions 1. Position the cursor over the MCR or ZCL instruction you want to change. 2. Press either -(MCR)- or -(ZCL)- or any other appropriate instruction type key. 3. Enter any parameters that may be required by a new instruction. Immediate I/O update instructions interrupt the program scan to update I/O data before the normal I/O update sequence.
Chapter 10 Program Control Instruction Figure 10.3 Immediate Input Instruction I/O scan Program scan Immediate Input instruction interrupts program scan 2 slot I/O group Examine bits in word 112 here in program Returns to program scan Word 112 16 bits from one module group written into input image table word module group (input) 10129 An Immediate Output Update instruction interrupts the program scan to update the module group with data from corresponding output image table word address (Figure 10.
Chapter 10 Program Control Instructions Figure 10.4 Immediate Output Instruction I/O Scan Program Scan control bits of word 014 here in program Immediate Output instruction interrupts program scan returns to program scan word 014 writes all 16 bits from one output image table word to one module group 2 slot I/O group module group (output) 10130 Keystrokes Enter an Immediate Input or Immediate Output instruction by performing the following steps. 1. Press either -[I]- or -[IOT]-. 2.
Chapter 10 Program Control Instruction Removing an Immediate Output Instruction The only way to remove an Immediate Output Update instruction is to remove the entire rung. See chapter 11. Removing an Immediate Input Instruction Remove an Immediate Input Update instruction by performing the following steps. 1. Position the cursor over the Immediate Input Update instruction you want to remove. 2. Press [REMOVE]-[I]-.
Chapter 11 Timers and Counters Chapter Objectives This chapter describes two instructions that keep track of timed intervals or counted events: timers counters Introduction Timer and counter instructions are output instructions internal to the processor. They provide many of the capabilities available with timing relays and solid state timing/counting devices.
Chapter 11 Timers and Counters Preset Value (PR) Storage begins at an address 100 words greater than its corresponding AC value. Function: Timer Instructions Timers number of elapsed timed intervals Counters number of counted events Both when the accumulated value equals the preset value, AC = PR, a status bit is set and can be examined to turn an output device on or off. A timer counts the elapsed time-base intervals and stores this count in the accumulated value word.
Chapter 11 Timers and Counters When the timer on delay rung condition becomes: True Timer cycle begins. Timer increments its AC value. Bit 15 is set when AC=PR and the timer stops timing. Bit 17 is set. False Accumulated value resets to 000. Bits 15 and 17 are reset. The accumulated value and status bits are also reset when the Mode Select Switch is turned from the PROG position to RUN/PROGRAM or RUN. Timer Off Delay The Timer Off Delay instruction is programmed as an output instruction.
Chapter 11 Timers and Counters 3. 4. Enter
Chapter 11 Timers and Counters When the rung condition becomes: True Timer begins counting time-base intervals. Bit 15 is set when AC=PR and the timer stops timing. Bit 17 is set. False Accumulated value is retained. Bit 15 - no action is taken. Bit 17 is reset. Important: The RTO instruction retains its AC value when the: Rung condition turns false. Processor changes to remote/program mode. Power outage occurs and memory backup is maintained.
Chapter 11 Timers and Counters Keystrokes Enter a Retentive Timer On or a Retentive Timer Reset instruction by performing the following steps. 1. Press either –(RTO)– or –(RTR)–. 2. Enter
. Perform steps 3, 4 and 5 for a Retentive Timer On instruction only. 3. Enter Chapter 11 Timers and Counters Counter Instructions A counter counts the number of events that occur and stores this count in its accumulated value word. Counters can be located anywhere in the data table. An event is defined as a false-to-true transition. Counter instructions have no time base..
Chapter 11 Timers and Counters False Accumulated value is retained. Bit 14 - no action is taken. Bit 15 - no action is taken. Bit 17 is reset. The Up Counter instruction retains its AC value when: You change the mode to program or remote program. The rung condition turns false. A power outage occurs and memory backup is maintained. Important: Bit 14 of the accumulated value word is set when the accumulated value either overflows or underflows.
Chapter 11 Timers and Counters Important: When a down counter preset is 000, the underflow bit 14 will not be set when the count goes below 0 and the count complete bit 15 will not be reset when AC < PR. Counter Reset The Counter Reset instruction resets the up counter or down counter instructions accumulated value and status bits to 0. When used alone, the Down Counter’s accumulated value may need to be “reset” in the program to its original value (usually a value other than 000).
Chapter 11 Timers and Counters Editing in a Completed Rung You edit an Up Counter, a Down Counter, or a Counter Reset instruction by performing the following steps. 1. Position the cursor over the Up Counter, Down Counter or Counter Reset you want to change. 2. Press either -(CTU)-, -(CTD)-, -(CTR)-, or any other appropriate instruction type. 3. Enter
. Important: Do not perform steps 4 and 5 for a Counter Reset instruction. 11-10 4. Enter if appropriate. 5.Chapter 12 Data Manipulation and Comparison Instructions Chapter Objectives In this chapter, you will read about two types of instructions used to transfer and compare data and how to use these instructions to perform operations of data that is stored in the data table. These types of instructions are: transfer instructions compare instructions Get A Get instruction accesses all 16 bits of one word in the data table.
Chapter 12 Data Manipulatuion and Comparison Instructions Put A Put instruction receives all 16 bits of data from the immediately preceding Get instruction and stores the data at the specified data table word location. Use with a Get instruction to form a data transfer rung. This instruction is programmed in the output side of the ladder diagram rung. This instruction can have the same address as other instructions in the program. It must be immediately preceded by a Get instruction.
Chapter 12 Data Manipulation and Comparison Instructions Editing a Get Instruction on a Partially Completed Rung 1. Enter the next instruction. 2. Position the cursor over the GET instruction. 3. Press -[G]- or any other appropriate instruction type key. 4. Enter
. 5. Enter if appropriate. Editing a Get or Put Instruction in a Completed Rung 1. Position the cursor over the GET or PUT instruction. 2. Press -[G]-, -(PUT)-, or any other appropriate instruction type key. 3.Chapter 12 Data Manipulatuion and Comparison Instructions If the rung condition becomes: True False If there is equality. If there is no equality. Keystrokes Enter an Equal To instruction by performing the following steps. 1. Press -[=]-. 2. Enter
. 3. Enter if appropriate. Removing an Equal To Instruction Remove an Equal To instruction by performing the following steps. 1. Position the cursor over the Equal To instruction you are going to remove. 2.Chapter 12 Data Manipulation and Comparison Instructions When YYY is less than 654, the Get/Less Than comparison is true and 010/02 is energized. The rung condition becomes: True False If the get value is less than the reference value stored in the Less Than instruction. If the get value is equal to or greater than the less than value. Keystrokes Enter a Less Than instruction by performing the following steps. 1. Press -[<]-. 2. Enter
. 3. Enter .Chapter 12 Data Manipulatuion and Comparison Instructions Programmed with a Get Byte instruction located in the condition area of the ladder diagram. Do not place compare instructions between the Get Byte and Limit Test instruction. The Get Byte and Limit Test instructions work only with octal values (ranging from 000 to 377). There are two cases for comparison: Case 1.
Chapter 12 Data Manipulation and Comparison Instructions Case 2. Lower Limit YYY Upper Limit 010 120 0451 050 170 B L 200 06 YYY8 05 3778 YYY8 True 2008 False 1708 YYY8 True 000 If YYY is equal to or less than 200 and equal to or greater than 170, the comparison is false and logic continuity is not established. If YYY8 is greater than 200 or less than 170, the comparison is true and logic continuity is established. Keystrokes Enter a Limit Test instruction by performing the following steps. 1.
Chapter 12 Data Manipulatuion and Comparison Instructions Operations Involving Transfer and Comparison Instructions You can perform four operations involving transfer and comparison instructions. equal to or less than greater than equal to or greater than get byte/put Equal To or Less Than The Equal To/Less Than comparison is made using the Get, Less Than, Equal To, and branching instructions. The Get value is the changing value. The Less Than and Equal To instructions are assigned a reference value.
Chapter 12 Data Manipulation and Comparison Instructions 9. Press -[=]-. 10. Enter the same address as that entered for the Less Than instruction. 11. Enter . 12. Press [ ] 13. Press -( )-. 14. Enter . Editing the Operation See the editing for the Get, Less Than, Equal To, and branching instructions. Greater Than A Greater Than comparison is also made with the Get/Less Than pair of instructions.
Chapter 12 Data Manipulatuion and Comparison Instructions Editing the Operation See the editing for the Get and Less Than instructions Equal To or Greater Than This comparison is made using the Get, Less Than, Equal To, and branching instructions. The Get value is assigned a reference value. The Less Than and Equal To values are changing and are compared to the Get value.
Chapter 12 Data Manipulation and Comparison Instructions Editing the Operation See the editing Get, Less Than, Equal To, and branching instructions. Get Byte The Get Byte instruction addresses either the upper or lower byte of a data table word. A 1 is entered after the word address for the upper byte; a 0 is entered for the lower byte. The Get Byte instruction accesses 1 byte (instead of word) from one address in the data table. The data is displayed in octal format.
Chapter 12 Data Manipulatuion and Comparison Instructions The Get Byte instruction addresses either the upper or lower byte of a data table word. A 1 is entered after the word address for an upper byte; a 0 is entered for the lower byte. There are two ways to perform a Get Byte/Put instruction. Case 1. One Get Byte XXXD B 040 PUT ZZZ ZZZZ YYY8 16 only these three letters are displayed The Get Byte instruction is programmed in the condition area of the ladder rung.
Chapter 12 Data Manipulation and Comparison Instructions 4. Press -(PUT)-. 5. Enter
. Editing the Operation Edit a Get Byte/Put instruction by performing the following steps. 1. Position the cursor over -[B]-. 2. Press -[B]-. 3. Enter . 4. Enter . Important: Repeat steps 2, 3 and 4 when using two Get Byte instructions. 5. Press -(PUT)-. 6. Enter .Chapter 13 Three Digit Math Instructions Chapter Objectives This chapter explains the three-digit math instructions. Three Digit Math Your processor can perform four operations using three-digit math: addition subtraction multiplication division These operations are not signed functions. Addition Reports the sum of two values from the two Get instructions immediately preceding the addition instruction. Programmed in the output position of the ladder diagram rung.
Chapter 13 Three Digit Math Instructions Subtraction Reports the difference between two Get values immediately preceding the subtraction instruction. The second get word value is subtracted from the first get word value. Programmed in the output position of the ladder diagram rung. The difference is stored in the subtract instruction word address. 070 G 134 071 G 039 072 095 When the difference is a negative number, the underflow bit (bit 16) in the subtract instruction word is set.
Chapter 13 Three Digit Math Instructions Division Reports the quotient of two values stored in the two Get instructions immediately preceding division instruction. Programmed in the output position of the ladder diagram rung. The quotient is stored in two divide instruction words. The first word contains the most significant word and the second word contains the least significant digit. 140 G 050 141 G 025 066 067 : : 002.
Chapter 13 Three Digit Math Instructions Editing a Completed Rung Edit a three-digit math operation by performing the following steps. 13-4 1. See chapter 12 and follow the editing procedure for a Get instruction. 2. Position the cursor over the math function. 3. Press the appropriate instruction key. 4. Enter .
Chapter 14 EAF Math Instructions Chapter Objectives This chapter describes the EAF (Execute Auxiliary Function) math instructions. Table 14.A lists these instructions. Table 14.A EAF Function Numbers If you want to perform an operation of this type Use this function number The Mini PLC 2/02, Mini PLC 2/16, and Mini PLC 2/17 can perform these functions.
Chapter 14 EAF Math Instructions Figure 14.
Chapter 14 EAF Math Instructions Operand B can have as many as 4 data table words. They must be in the same rung as the EAF. Conditioning statements are not permitted between these Gets and the EAF. This operand can use as many as 4 Gets, and their addresses do not have to be consecutive. See the data addresses of Operand B in Figure 14.1 (b, d, g, and k). To enter the number ABC use only one Get or one data table word.
Chapter 14 EAF Math Instructions Bits 14-17 of the result word are reserved for status bits: This Bit: 14 Stores this: overflow/underflow 1 indicates overflow/underflow 0 result is in range 15 zero indicator 1 zero result 0 non zero result 16 sign bit 1 negative ( ) 0 positive (+) 17 not used Data Table Format After Address Entry If you select a data address of 040 for operand A, the EAF establishes a data table format with four consecutive words as shown in Figure 14.2.
Chapter 14 EAF Math Instructions Figure 14.
Chapter 14 EAF Math Instructions Figure 14.3 EAF Input and Result Rung Result Operand A Operand B 060 G 000 040 G 000 050 G 000 061 G 300 041 G 250 051 G 050 062 G 000 042 G 000 052 G 000 063 G 000 043 G 000 053 G 000 EXECUTE AUX FUNCTION FUNCTION NUMBER: 01 DATA ADDR: 040 RESULT ADDR: 060 Keystrokes Enter an EAF input and result rung (like Figure 14.3) be performing the following steps. 1. Press 2. Enter Result and Operand branches. 3. Enter the values for Operands A and B.
Chapter 14 EAF Math Instructions Figure 14.4 EAF Addition Function Input and Display Rungs 060 G 359 040 G 256 050 G 102 061 G 130 041 G 384 051 G 746 062 G 000 042 G 000 052 G 000 063 G 000 043 G 000 053 G 000 EXECUTE AUX FUNCTION FUNCTION NUMBER: 01 DATA ADDR: 040 RESULT ADDR: 060 Enter values for operands A and B. Entry of Operand A = 256384 and Operand B = 102746 produces the Result 359130 for addition (Figure 14.4) or 153638 for subtraction. Figure 14.
Chapter 14 EAF Math Instructions Multiplication and Division This EAF multiplies (or divides) two numbers. Word formats for multiplication and division are the same. The only difference between the two EAFs is their function numbers: multiplication is 03 and division is 04. Both of these functions limit calculations to six digits per operand, stored anywhere within the 12 available digits. (+/- xxx xxx . xxx xxx) x or / (+/- xxx xxx . xxx xxx)= +/- yyy yyy .
Chapter 14 EAF Math Instructions Figure 14.
Chapter 14 EAF Math Instructions Figure 14.8 EAF Power Function Input and Display Rungs 060 G 000 040 G 000 050 G 000 061 G 032 041 G 005 051 G 002 062 G 000 042 G 000 052 G 000 063 G 000 043 G 000 053 G 000 EXECUTE AUX FUNCTION FUNCTION NUMBER: 33 DATA ADDR: 040 RESULT ADDR: 060 Enter the values for the base and the exponent. Entry of y = 2 in word 050 and x = 5 in word 041 produces the result 32. Figure 14.9 shows how the words are stored in the data table.
Chapter 14 EAF Math Instructions Figure 14.10 EAF One Operand Word and Digit Format in the Data Table 17 16 15 14 13 S Operand A Result X S 0 10 7 43 0 Data Address Digit 1 MSD Digit 2 Digit 3 040 Digit 4 Digit 5 Digit 6 046 Digit 7 Digit 8 Digit 9 052 Digit 10 Digit 11 Digit 12 LSD 055 Result Address 060 O/U 061 062 063 10348-I The Operand and the Result words have the format xxx xxx . xxx xxx.
Chapter 14 EAF Math Instructions To enter the number ABC DEF . GHI use three Gets or three data table words. ––––[G]–––[G]–––[G]––– +/– ABC DEF GHI ABC DEF . GHI xxx To enter the number ABC DEF . GHI JKL use four Gets or four data table words. ––––[G]–––[G]–––[G]–––[G]––– ABC DEF . GHI JKL +/– ABC DEF GHI JKL The numbers have a fixed decimal point that is implied but not displayed. The Result word can be placed in any legal location in the data table. However, you must select four consecutive locations.
Chapter 14 EAF Math Instructions Data Table Format After Address Entry Be careful not to select data and result addresses so that they overlap. Figure 14.
Chapter 14 EAF Math Instructions Keystrokes Enter a one operand EAF (like Figure 14.12) by performing the following steps. 1. Press 2. Enter result and data branch. 3. Enter the values for the Operand. 4. Complete the parallel branches. 5. Press [Shift] [EAF]. 6. Enter the appropriate function number (Table 14.A). 7. Enter the data and result addresses of the EAF instruction. . ATTENTION: Do not enter data in hexadecimal. Enter all data in BCD.
Chapter 14 EAF Math Instructions Exponential Enter an exponential function EAF rung like that shown in Figure 14.13. Figure 14.13 EAF Exponential Function Input and Display Rung 060 G 000 040 G 000 061 G 332 041 G 009 062 G 900 042 G 420 063 G 000 043 G 000 EXECUTE AUX FUNCTION FUNCTION NUMBER: 32 DATA ADDR: 040 RESULT ADDR: 060 Enter values for the operand. You can enter these values from the keyboard of your 1770-T3 terminal or through ladder diagram functions.
Chapter 14 EAF Math Instructions Square Root This function finds the value of +x1/2= y. The Operand and Result words have the format: + xxx xxx . xxx xxx1/2= + yyy yyy . yyy yyy If you want to find the square root of a negative number, this function ignores the minus sign and finds the square root of the absolute value of the number. Enter an EAF square root function like that shown in Figure 14.15. Figure 14.
Chapter 14 EAF Math Instructions Figure 14.16 EAF Square Root Format in the Data Table After Execution 17 16 15 14 13 0 Operand A 10 7 Data 0 Address 43 0 0 0 040 1 4 4 041 0 0 0 042 0 0 0 043 Result Address Result X S 0 0 0 0 060 0 1 2 061 0 0 0 062 0 0 0 063 10356-I 10 to the X The 10 to the x function finds the value of 10x = y. The Operand and Result words have the format: x = exponent of 10 (maximum value = 5.
Chapter 14 EAF Math Instructions Figure 14.18 EAF Power of 10 Format in the Data Table After Execution 17 16 15 14 13 0 Operand A 10 7 Data Address 0 43 0 0 0 040 0 0 2 041 3 8 6 042 0 0 0 043 Result Address Result 0 0 0 060 2 4 3 061 2 2 1 062 0 0 0 063 10357-I Reciprocal The Reciprocal EAF instruction is a feature of the Mini-PLC-2/17 processor only. This EAF function finds the reciprocal of a number. The Operand and Result words have the format: 1/ +/–xxx xxx .
Chapter 14 EAF Math Instructions Figure 14.20 EAF Reciprocal Format in the Data Table After Execution 17 16 15 0 Operand A 14 13 10 7 Data 0 Address 43 0 0 0 040 1 2 4 041 0 0 0 042 0 0 0 043 Result Address Result X 0 X 0 0 0 060 0 0 0 061 0 0 8 062 0 6 5 063 10358-I BCD to Binary The BCD to Binary conversion function converts a BCD Conversion number into a binary number.
Chapter 14 EAF Math Instructions Enter the BCD number. Entry of the BCD number 004 095 produces the hexadecimal number FFF. If the Operand is greater than +32 767, the result 7FFFh is stored in the data table. However, you will see only FFF below the instruction. You must use a SEARCH 53 to see the entire word. If the Operand is more negative than –32 767, 8001 is displayed at the result address. All negative values are stored as two’s complement. Figure 14.
Chapter 14 EAF Math Instructions Enter a Binary number. Entry of the binary number FFF produces the BCD number 004 095. If you enter 7FFF (use SEARCH 53 and set the bits), 32 767 is displayed. All negative values are stored as two’s complement. Figure 14.24 shows how the result is stored in the data table. Bit 16 of the first Result Address word is the sign bit of the BCD number. Figure 14.
Chapter 15 EAF Logarithmic, Trigonometric, and FIFO Instructions Chapter Objectives This chapter describes the Logarithmic, Trigonometric, and FIFO Load, and FIFO Unload EAF instructions. Table 15.A EAF Function Numbers If you want to perform an operation of this type Use this function number The Mini PLC 2/02, Mini PLC 2/16 and Mini PLC 2/17 can perform these functions FIFO Load FIFO Unload Log10 Sin x Cos x (28) (29) (30) (35) (36) The Mini PLC 2/17 can perform these additional functions.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.1 EAF One Operand Word and Digit Format in the Data Table 17 16 15 14 13 S Operand Result X S 0 10 7 43 0 Data Address b Digit 1 MSD Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 d Digit 7 Digit 8 Digit 9 g Digit 10 Digit 11 Digit 12 LSD k Result Address r O/U r+1 r+2 r+3 10363-I The Operand and the Result words have the format xxx xxx . xxx xxx.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions To enter the number ABC DEF use two Gets or two data table words. ––––[G]–––[G]––– +/– ABC DEF ABC DEF . xxx xxx To enter the number ABC DEF . GHI use three Gets or three data table words. ––––[G]–––[G]–––[G]––– +/– ABC DEF GHI ABC DEF . GHI xxx To enter the number ABC DEF . GHI JKL use four Gets or four data table words. ––––[G]–––[G]–––[G]–––[G]––– ABC DEF .
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Data Table Format After Address Entry Be careful not to select operand (data) and result addresses so that they overlap. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Keystrokes Enter an EAF input and result rung (like Figure 15.3) by performing the following steps. 1. Press 2. Enter the result branch with its four Gets. Press operand with its four Gets. 3. Enter the values for the Operand. 4. Complete the parallel branches. 5. Press [Shift] [EAF]. 6. Enter the appropriate function number (Table 15.A). 7. Enter the data and result addresses. .
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Enter the value for the operand. Entry of operand (base 10) = 648 produces the result 2.811572. Figure 15.5 shows how the result is stored in the data table. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions 0.866025 for the sine function and and 0.500 for the cosine function. Figure 15.7 shows how it is stored in the data table. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Bits 14-17 of the result word are reserved for status bits: This Bit: 14 Stores this: file empty indicator 1 file is empty 0 file has data You cannot unload data from an empty file. If the FIFO file is empty, there is no data to unload. Use this bit to condition a FIFO Unload. 15 file full indicator 1 file is full 0 file has data You cannot load data after the FIFO file is full. If you attempt to load any data it will be lost.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions FIFO Load Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.10 shows how the first data is stored in the data table before the FIFO Load is energized. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.11 shows a full file. Inspect word 050 (Figure 15.12), you will find that bit 15 is set (1) indicating the file is full. Bit 17 follows the condition of the rung. Bit 17 is set (1) if the FIFO Load rung is true. Bit 17 is reset (0) if the rung is false. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.12 shows how a full file is stored in the data table. Figure 15.12 This Is a Full File Stored in the Data Table 040 041 042 043 044 050 060 061 130 1 0 1 0 0 0 0 0 0 0 10 07 00 4 0 6 4 0 6 0 5 0 0 5 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 0 0 5 5 0 5 0 5 0 < 030 031 032 033 034 035 17 The full file 0 1 10368-I If you want to load zero as valid FIFO data, insert zeros in the Input Word.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.14 shows how zero is stored in the file as valid FIFO data. Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions If you want to keep zero as valid FIFO data, leave the bit set and it will progress through the file as any other word would. However, if you want to get rid of zero, you could reset the bit with ladder logic. The Result Word will not reflect the change until the next data is transferred into or out of the file. The zeros are then over-written.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.
Chapter 15 EAF Logarithmic, Trigonometric and FIFO Instructions Figure 15.17 shows how the first unloaded data is stored in the data table. Figure 15.
Chapter 16 EAF Process Control Instructions Chapter Objectives This chapter describes the EAF Process Control instructions, which are a feature of the Mini-PLC-2/17 processor only. Table 16.
Chapter 16 EAF Process Control Instructions PID Features The PID EAF instruction provides the following features: Selectable dependent or independent gain PID equations Manual to automatic mode with bumpless transfer Derivative term calculates from PV or error Process variable and setpoint scaled to engineering units Output alarms Output limiting with anti-reset windup Zero crossing dead band Feedforward or output biasing Direct or reverse control action Concepts PID Closed Loop Control (Figure 16.
Chapter 16 EAF Process Control Instructions This is accomplished by evaluating the PID equation whose output goes to a control device. An additional value may be added to the control output either as a bias to decrease offset when using proportional control, or as a feedforward control value. The result of the calculation tends to drive the quantity that you are trying to control towards the desired value (set point).
Chapter 16 EAF Process Control Instructions Independent Gains Using the independent gain equation you adjust the proportional, integral and derivative terms separately.
Chapter 16 EAF Process Control Instructions Loop Considerations The number of PID loops, loop update time, and type of input and output modules are important considerations for using the PID instruction. Consideration: Description: Number of PID loops The number of PID loops that a Mini PLC 2/17 processor can handle depends on the update time required by the loops. The longer the update time and the less sophisticated the loop control, the more loops can be controlled.
Chapter 16 EAF Process Control Instructions In both cases, PID data must be limited to a range of 0-4095. Set your analog input and output modules accordingly (by selection or by default in most analog modules). The PID Output (resultant address) is always formatted in 12-bit binary, with a range of 0-4095. Scale your output module accordingly.
Chapter 16 EAF Process Control Instructions Important:Do not set this bit when entering the PID instruction in Program mode. Since the PID instruction has not been executed yet, there is nothing to resume in Run mode. Set this bit only after the PID instruction has been executed in Run mode at least once. Bumpless Transfer with Proportional Controllers The Bumpless Transfer bit is located in the PID Control Block Word 02, Bit 11.
Chapter 16 EAF Process Control Instructions Table 16.
Chapter 16 EAF Process Control Instructions Table 16.
Chapter 16 EAF Process Control Instructions Table 16.D Words 03 through 09 All range values are unitless unless noted otherwise. Independent Gain Equation Range Range Dependent Gain Equation Word 03 0000 9999 00.00 99.99 Word 05 Range 1 2 3 16-10 Term 1/TI Range 00.00 99.99 Integral Gain Units Word 06 Unites - min 3 Feedforward - FFWD Range 1 Word 08 0000 9999 Maximum Scaling Value Word 09 0000 9999 rep/min Term TD Range 00.00 99.
Chapter 16 EAF Process Control Instructions Table 16.E Words 10 through 24 Independent Gain Equation Range Range Units Range Unites Range Units Range Units Range Range Range Units Dependent Gain Equation Word 10 0000 9999 Zero Crossing Dead Band Word 11 0000 100% Percent 0000 100% Set Output Value Word 12 Maximum Control Output Percent Word 13 0000 100% Minimum Control Output Percent Word 14 0000 99.
Chapter 16 EAF Process Control Instructions Entry and Display of a PID Control Instruction The following example programs show how to use the PID EAF. Figure 16.3 and the associated rung description give a detailed explanation of the basic sections of a PID program. We recommend that you study this example thoroughly before proceeding to the other example programs. The three programs that follow were programmed specifically for 1771-IF and 1771-OF modules. Figure 16.
Chapter 16 EAF Process Control Instructions Rung 1 This is a timing rung that toggles the block transfer. The timing value (preset x time base) must equal the loop update time of the PID instruction. Rung 2 The Block Transfer Read instruction rung inputs the process variable (PV), tieback (TB) and feedforward/bias, if used. Rung 3 The PID rung uses the block transfer done bit for conditioning and two GETs representing the tieback input and the process variable.
Chapter 16 EAF Process Control Instructions Entry and Display of a Selectable Timed Interrupt (STI) Controlled PID Function Figure 16.4 shows you how to enter and display an STI to execute a controlled PID function. The program that follows is programmed specifically for 1771-IE, -IF, -OF, -IX and -IY modules. For the 1771-IFE, -IL and -IR modules, add the module initialization rungs in the main program (see Figure 16.5). The processor executes 16 PID loops with an update time of 100 ms.
Chapter 16 EAF Process Control Instructions Figure 16.
Chapter 16 EAF Process Control Instructions Figure 16.
Chapter 16 EAF Process Control Instructions Figure 16.
Chapter 16 EAF Process Control Instructions Figure 16.
Chapter 16 EAF Process Control Instructions If you are using an 1771-IFE, -IL, -IR or -IXE module, place all module configuration rungs except rung 2 in the main program. Place rung 2 in the subroutine. Figure 16.5 shows what the modified STI block transfer looks like. Please consult the module’s user manual for specific Block Transfer programming requirements. Figure 16.
Chapter 16 EAF Process Control Instructions Software Manual Control Station Rungs 16 – 21 An additional group of PID instructions would cause the STI to exceed its allowed limit (33 ms for a 50 ms interrupt). This is the first four of a second group of eight PID instructions. They execute on the opposite scan from the first group of eight PID instructions so that the timing limit is not exceeded. Rungs 22 – 27 The second four PID instructions of the second group of PID instructions.
Chapter 16 EAF Process Control Instructions This list identifies the function of the ladder diagram symbols. 110/00 110/01 110/02 320/04 332 115/00 340 Cascading Loops Manual Push Button Auto Push Button Enter Push Button Set-Output bit PID Set-Output value Manual Override Output Value PID CO Value Figure 16.7 shows how you can cascade two loops by assigning the control output (CO) of one loop as the set point (SP) of the next loop. Locate these rungs in the main program.
Chapter 16 EAF Process Control Instructions Figure 16.7 Cascaded Loops 044 0044 TON .
Chapter 16 EAF Process Control Instructions De Scaling Inputs De-scaling is necessary to force the PID input range to 0 to 4095 when using an input module that does not return this range. A thermocouple input module is a good example. It returns a scaled temperature range, typically -300° to +1200° Fahrenheit. When specifying the input range for de-scaling, specify the maximum range that your process will actually see.
Chapter 16 EAF Process Control Instructions Subscripts 1 2 = = Units you are converting from Units you are converting to Since the converted range is always 0 to 4095, the equation simplifies to: M 2 + 4095 (M 1 * Smin 1) (Smax 1 * Smin 1) To simplify the actual programming, break the equation down into: M 2 + K (M 1 * Smin 1), where K + 4095 Smax 1 * Smin 1) For this example: K + 4095 , K + 7.8. So K + 7.8 is 550–25 the constant for de-scaling this termperature range.
Chapter 16 EAF Process Control Instructions The following ladder logic solution to the de-scaling equation assumes that Smax1 and Smin1 are between 0-999. For values less than 0 or greater than 999, additional math instructions would have to be programmed. Rung 1 Subtraction of Smin1 from M1. In this case, the input is at maximum, 550o C. Rung 2 This is the EAF math multiplication instruction necessary to handle the possible 4 digit BCD answer, in this case, 4095. Rung 2A Display branch.
Chapter 16 EAF Process Control Instructions Cascade (Word 01, Bit 05) Set/reset this bit for cascading two loops. When the bit is set, the loop is the secondary (fast) loop of the cascade. When the bit is reset, the loop is the primary (slow) loop of the cascade or not part of a cascade configuration. Control Action (Word 01, Bit 02) Set/Reset this bit to change the control action for the PID calculation.
Chapter 16 EAF Process Control Instructions Derivative Gain Constant (Word 06) When using the Independent Gain Equation, this is the derivative gain KD (sec). When using the Dependent Gains equation, this is the derivative time constant TD (min). Derivative Uses Error (Word 01, Bit 06) You can select whether the derivative term in either PID equation acts on changes in error or process variable. Consider selecting this feature if you want to accelerate the response to online changes to the setpoint.
Chapter 16 EAF Process Control Instructions Feedforward or Bias (Word 07) This input is added to the calculated control output of the PID equation. It is used when a bias is needed or if feedforward control is desired. This value can be a storage constant or a calculated variable of process measurement. Proportional only control will give a steady-state offset of the process variable from setpoint.
Chapter 16 EAF Process Control Instructions Input Format Bit (Word 01, Bit 07) Allows the Process Variable (PV) and Tieback (TB) to be input in Binary or BCD (series C or later). Reset (0) Set (1) PV and TB are in Binary PV and TB are in BCD Integral Gain (Word 05) When using the Independent Gain Equation, this value is the integral gain constant KI (rep/sec). When using the Dependent Gains Equation, this value is equal to TI (min/rep). KIx10(Word 02, Bit 00) When using the Independent Gains Equation.
Chapter 16 EAF Process Control Instructions Maximum Control Output (Word 12) This limits the maximum value of the Control Output. Defined as 0-100% of the 0-4095 Control Output range. This value works in conjunction with the Output Limiting feature and the Maximum Output Alarm. Maximum Scaling Value (Word 08) The scaling value which corresponds to the maximum setpoint and process variable in engineering units (such as PSI or oF). Range 0000 to 9999, the decimal point is implied by the user.
Chapter 16 EAF Process Control Instructions Output Limiting (Word 01, Bit 03) Set/Reset this bit to enable/inhibit output limiting. Reset (0) Set (1) Output limiting inhibited Output limiting enabled Set the output limits as a percentage (0-100%) of control output. When the instruction detects that the output has reached either of these limits, the instruction sets an alarm bit in word 01 of the PID control block and prevents the output from exceeding either value.
Chapter 16 EAF Process Control Instructions Important:This bit should not be set until a valid Control Output value is calculated and stored at the Result Address (i.e., until the PID instruction has been executed at least once in Run mode). Scaling Input scaling lets you specify the engineering units for the set point and Dead Band values and to display the process variable and error values in the same engineering units.
Chapter 16 EAF Process Control Instructions Set Output will not override Output Limiting. The Control Output abides by the Output Limiting value. For example, if Output Limiting is enabled and the Minimum Output is 30% and the set output is set to 0% and enabled, the Control Output goes to 30%. Set Output Value (Word 11) When operating in the Set Output mode, this value is sent as the Control Output. The PID instruction uses the value in this word only when the Set Output bit is set.
Chapter 16 EAF Process Control Instructions Averaging and Standard Deviation Functions These arithmetic functions have applications in various industries. You can use the average function for averaging thermocouple inputs or other process variables. You can use standard deviation and averaging for trend analysis and report generation.
Chapter 16 EAF Process Control Instructions 3. The first result word in the averaging EAF occurs in the second word after the beginning of the result word address. The first 4 words of the standard deviation result are reserved for internal processor functions. Averaging The averaging instruction determines the arithmetic average of a group of three digit BCD values. The maximum number of values you can average is 999 or is limited by the data table area available.
Chapter 16 EAF Process Control Instructions Figure 16.10 3 Digit Averaging Ladder Diagram THREE DIGIT AVERAGE: 033 15 1 033 034 15 15 1 FILE TO WORD MOVE 0034 COUNTER ADDR: 000 POSITION: 005 FILE LENGTH: FILE A: 0201-0205 FILE A: 0036 041 15 0032 G 005 033 15 1 1 0036 G 000 0034 DN 15 EXECUTE AUX FUNCTION FUNCTION NUMBER: 06 0047 DATA ADDR: 0040 RESULT ADDR: ^ Changing Data ^ Always 1 ^ Number of Samples 0047 G 000 0041 G 000 RES 0035 G 001 0033 TON 1.
Chapter 16 EAF Process Control Instructions Rung 3 This is an unconditional File-to-Word Move instruction containing the values you want to average. Addresses 201 through 205 are externally indexed by the counter 0034 and the position starting value must be zero (see rung 2). Rung 4 This is the averaging EAF rung. The input conditions (second rung) must be programmed as shown.
Chapter 16 EAF Process Control Instructions Rung 6 This rung displays the result with a decimal point implied but not shown between the two words. Word 041 contains the 3 most significant digits and word (042) contains the 3 least significant digits. The values of these words are not valid until the done bit (04115) is ON. Word 040, the RESULT ADDR(ess) of the EAF instruction, is used for intermediate calculations and must not be manipulated by the user.
Chapter 16 EAF Process Control Instructions Figure 16.
Chapter 16 EAF Process Control Instructions Rung 3 This is an unconditional File-to-Word Move instruction containing the values for which you want to calculate the standard deviation. Addresses 201 through 205 are externally indexed by the counter 0034. The starting position must be one (see rung 2). Rung 4 This is the EAF rung. Bit 03315 a timer done bit enabling the calculation.
Chapter 16 EAF Process Control Instructions Rung 5 This is the Data Address of the EAF instruction. It points the next value added to the calculation (present position). This is an optional display rung. Rung 6 This rung displays the result of the EAF instruction. Words 040 through 043 are used for internal calculations and must not be manipulated.
Chapter 16 EAF Process Control Instructions Averaging The averaging instruction determines the arithmetic average of a group of six digit BCD values. The maximum number of values you can average is 999 or is limited by the data table area available. The Averaging instruction uses the formula: y + n ȍ Xn i i+1 where: Xi = y = n = six digit signed BCD values the average of the values the number of values Entry and Display of Input and Result Values Figure 16.
Chapter 16 EAF Process Control Instructions Rung 1 The EAF rung calculates an average upon a false-to-true transition of bit 15000. This bit must remain energized until the done bit (bit 16115 in this example) is energized. Word 0030 the number of samples you want to average. Word 0031 the number of samples to sum per scan (from 1 to the total number of samples). The Data Address of the EAF (040) is reserved for the preset position.
Chapter 16 EAF Process Control Instructions Standard Deviation The Standard Deviation instruction determines the standard deviation of a group of six digit values. The maximum number of values the instruction can handle is 999 or is limited by the data table area available.
Chapter 16 EAF Process Control Instructions If you want to calculate the standard deviation of a new set of values, you must: Wall Clock/Calendar 1. Reset to zero the data in the data address word (0040 in this example). 2. Reset to zero the data in the result words (0160-0173) in this example). 3. Initiate a false to true transition of bit 15000. The EAF Wall Clock/Calendar function allows you to set time, date, leap year, and day of the week and read them for control and reporting purposes.
Chapter 16 EAF Process Control Instructions Figure 16.14 EAF Set and Read Rung 011 00 020 G 010 021 022 G G 027 000 040 G 010 041 G 027 042 G 059 EXECUTE AUX FUNCTION FUNCTION NUMBER: 10 010 DATA ADDR: 200 RESULT ADDR: EXECUTE AUX FUNCTION FUNCTION NUMBER: 15 200 DATA ADDR: 040 RESULT ADDR: Keystrokes Enter an EAF (like Figure 16.14) by performing the following steps. 1. Enter the Examine On and Get instructions. 2. Press [Shift] [EAF]. 3. Enter the appropriate function number (Table 16.A). 4.
Chapter 16 EAF Process Control Instructions Figure 16.15 Set and Read Time Input and Display Rungs 011 00 020 G 010 021 022 G G 027 000 040 G 010 041 G 027 042 G 059 EXECUTE AUX FUNCTION FUNCTION NUMBER: 10 010 DATA ADDR: 010 RESULT ADDR: EXECUTE AUX FUNCTION FUNCTION NUMBER: 15 010 DATA ADDR: 040 RESULT ADDR: Enter the time and set the condition bit (01100) true. Then, start the clock by resetting the condition bit. Dates Dates are entered as numbers. For example: November is displayed as 011.
Chapter 16 EAF Process Control Instructions Leap Year and the Day of the Week Leap year is displayed as a number representing the number of years since the last leap year. For example: –[GET]–[GET]– 00A 00B In the first Get: 000 represents leap year 001 represents the first year since leap year 002 represents the second year since leap year 003 represents the third year since leap year In the second Get, the day of the week is displayed as a number from 1-7. You may set this Get to any number from 1-7.
Chapter 17 Jump Instructions and Subroutine Programming Chapter Objectives This chapter describes the instructions you can use to selectively jump over portions of a program. The instructions are: Jump Jump to Subroutine Label Return This chapter describes how jump instructions and subroutine programming direct the path of the program scan through the main program and the subroutine area. Jump A Jump instruction is an output instruction. It has an identification number from 00-07.
Chapter 17 Jump Instructions and Subroutine Prorgramming Jump to Subroutine The Jump to Subroutine instruction is an output instruction. It has an octal identification number from 00-07. When its rung is true, it instructs the processor to jump from the main program to the label instruction having the same number in the subroutine area. Subroutine execution begins at that point. This instruction always causes the processor to cross the boundary from the main program to the subroutine area.
Chapter 17 Jump Instructions and Subroutine Programming Return The Return instruction is an output instruction. It is used only in the subroutine area to terminate a subroutine or selectable timed interrupt and return the processor to the main program or, in the case of nested subroutines, return program execution to the preceding subroutine. It returns program execution to the instruction immediately following the Jump to Subroutine instruction that initiated the subroutine.
Chapter 17 Jump Instructions and Subroutine Prorgramming Figure 17.
Chapter 17 Jump Instructions and Subroutine Programming You can program a maximum of 8 subroutines in the subroutine area. Each subroutine begins with a Label instruction and ends with a return instruction. The Return should be an unconditional rung. The subroutine area serves as the end of the main program and defines the beginning of the subroutine area (Figure 17.2). Figure 17.
Chapter 17 Jump Instructions and Subroutine Prorgramming The boundary marker subroutine area appears. A Subroutine Area instruction can only be programmed after the last instruction in the main program. The Subroutine Area instruction cannot be inserted between rungs in the main program. It requires 1 word of memory, it can be programmed only once, and it cannot be removed except by clearing the memory.
Chapter 18 Block Transfer Chapter Objectives This chapter describes 3 types of block transfer: read write bi-directional Block transfer is a combination of an instruction and support rungs used to transfer as many as 64 16-bit words of data in one scan from I/O modules to/from the data table. This transfer method is used by intelligent I/O modules such as the analog, PID, servo positioning, stepper positioning, ASCII, thermocouple, or encoder/counter modules.
Chapter 18 Block Transfer Figure 18.1 Image Table Byte Relationship versus Module Position I/O rack Data table Output image table word, lower byte 17 Bit numbers 10 07 00 Output image table Control byte 010 012 Block transfer module 017 Input image table word, lower byte Input image table Status byte 110 112 117 The lower byte of the I/O image table words are used when the module is in the lower slot. Lower slot Upper slot 10222 The block transfer read or write operation (Figure 18.
Chapter 18 Block Transfer Figure 18.2 Block Transfer Timing Diagram Transfer is made in I/O Scan Output Scan Input Scan Request is made in Program Scan 10377-I The module address is stored in the timer/counter accumulated area in the same manner as an accumulated value of a timer. The word address at which the module address is stored is called the data address of the instruction.
Chapter 18 Block Transfer Block Transfer Format The format of a block transfer read and a block transfer write instruction with default values is shown in Figure 18.3. Figure 18.3 Block Transfer Format BLOCK X FER READ DATA ADDR: 030 MODULE ADDR: 100 BLOCK LENGTH: 01 FILE: 110- 110 BLOCK X FER WRITE DATA ADDR: 030 MODULE ADDR: 100 BLOCK LENGTH: 01 FILE: 110- 110 Numbers shown are default values.
Chapter 18 Block Transfer Data Address The data address stores the module address of the block transfer module. The data address must be assigned the first available address in the timer/counter accumulated area of the data table. This depends on the number of I/O racks being used (Table 18.B). When more than 1 block transfer module is used, consecutive data addresses must be assigned ahead of addresses for timer and counter instructions. Table 18.
Chapter 18 Block Transfer Module Address The module address is stored in BCD with the first digit representing the rack number, the second digit the I/O group number and the third digit the slot number. When block transfer is performed, the processor searches the timer/counter accumulated area of the data table for a match of the module address. When a match is found, the processor looks 1008 above that value to find the address of the block transfer data file.
Chapter 18 Block Transfer Unequal Block Lengths Consult the documentation for the block transfer module for programming guidelines when setting the block lengths to unequal values. ATTENTION: When the block lengths of bi-directional block transfer instructions are set to unequal values, the rung containing the alternate instruction must not be enabled until the done bit of the first transfer is set.
Chapter 18 Block Transfer Run Time Errors Misuse and/or inadvertent changes of instruction data can cause run-time errors when: The module address is given a non-existent I/O rack number. A read transfer overruns the file into a processor work area or into user program by an inadvertent change of the block length code. Block Transfer Read Block transfer reads data from an I/O module into the processor’s input image table in one I/O scan. Programmed as an output instruction.
Chapter 18 Block Transfer Figure 18.5 Data Table Locations for Block Transfer Read 010 Output Image Table R 1 Data Table Block Length Code 012 Output image table byte contains read enable bit and block length in binary code. 017 027 1 Timer/ Counter Accumulated Area 2 1 Data Address contains module address in BCD. 060 First File Word 067 Last File Word Block Transfer Data 110 R Input Image Table 030 1 112 Input image table byte contains done bit.
Chapter 18 Block Transfer Keystrokes Enter a block transfer read (like this example) by performing the following steps. BLOCK XFER 1 Block Transfer 0 appears in the lower left corner of the screen, above the processor’s current programming mode. BLOCK X FER READ 030 DATA ADDR: 100 MODULE ADDR: 01 BLOCK LENGTH: 110- 110 FILE: 010 EN 07 110 DN 07 Note that the words BLOCK TRANSFER READ are flashing. Insert the following values. The cursor moves automatically through the block transfer read instruction.
Chapter 18 Block Transfer Block Transfer Write A block transfer writes data from the processor’s output image table to an I/O module in one scan. Programmed as an output instruction. Block length depends on the type of module you are using. Request for transfer is made in the program scan. I/O scan is interrupted for the transfer. Done bit remains on for one scan after a valid transfer. Request requires two words of the data table.
Chapter 18 Block Transfer You can enter data directly into the block to be transferred. Position the cursor over the block transfer instruction and press [Display] [1]. See chapter 9. Bi Directional Block Transfer Bi-directional block transfer is the sequential performance of both operations. The order of operation is generally determined by the module. Two data addresses must be used. In this example they are 030 and 031. Both contain the module address.
Chapter 18 Block Transfer Figure 18.
Chapter 18 Block Transfer Keystrokes Enter a bi-directional block transfer (like this example) by performing the following steps. BLOCK XFER 1 Block Transfer 0 appears in the lower left corner of the screen, above the processor’s current programming mode. BLOCK X FER READ DATA ADDR: 030 MODULE ADDR: 100 BLOCK LENGTH: 01 FILE: 110- 110 010 EN 07 110 DN 07 The Block Transfer enable bit is 01007; the done bit is 11007. Note that the words BLOCK TRANSFER READ are flashing.
Chapter 18 Block Transfer BLOCK XFER 0 Block Transfer 0 appears in the lower left corner of the screen, above the processor’s current programming mode. BLOCK X FER READ DATA ADDR: 030 MODULE ADDR: 100 BLOCK LENGTH: 01 FILE: 110- 110 010 EN 06 110 DN 06 Note that the words BLOCK TRANSFER WRITE are flashing. Insert the following values. The cursor will move automatically through the block transfer read instruction.
Chapter 18 Block Transfer Multiple Reads of Different Block Lengths Under certain conditions, you might want to transfer part of a file rather than the entire file. For example, a processor could be programmed to read the first two or three channels of an analog input module periodically but read all channels less frequently. To do this, use 2 or more Block Transfer Read instructions: one for each desired transfer length.
Chapter 18 Block Transfer Figure 18.
Chapter 18 Block Transfer One technique of buffering data is to store the transferred data in a temporary buffer file. If the data in the buffer is valid, it is immediately transferred to another file in the data table where it can be used. If invalid, it is not transferred but written over in the next transfer. Another technique uses only one file. The technique prevents invalid data from being operated upon by preconditioning the rungs that would transfer data out of a file one word at a time.
Chapter 18 Block Transfer Figure 18.8 Buffering Data R 1 1 0 Block Length Code 4 0 Block Transfer Data (Buffer) Data in the buffer file 050 052 will be moved to 150 152 when: 030 A. Done Bit 114/07 is set (Valid transfer) 050 B.
Chapter 18 Block Transfer module is loaded into words 050-052. When block transfer is complete, done bit 114/07 is set in the input image table byte. This indicates the block transfer was successfully performed. The processor then continues with the I/O scan and program scan. 3. Two Get Method In rung 2, bit 114/07 is still on and a diagnostic bit is examined to ensure the data read from the module is valid.
Chapter 18 Block Transfer First Get Instruction The first Get instruction (Figure 18.9) identifies the rack location of the block transfer module. The location must be stored in the first available address in the timer/counter accumulated value area of the data table, starting with 030. When more than one block transfer module is used, consecutive addresses must be assigned in this area.
Chapter 18 Block Transfer Figure 18.10 Selecting Block Transfer Data Area 010 013 Output Image Table 1 1 Timer/ Counter AC Area 3 1 060 Block Transfer Data 067 Analog input module (8 bit) located in Rack 1 Module Group 3, Slot 1 110 Input Image Table 0 6 Timer/ Counter PR Area 030 G 131 027 030 130 G 060 0 127 130 013 17 10382-I Output Energize Instruction The Output Energize instruction (Figure 18.9) initiates the block transfer.
Chapter 18 Block Transfer Figure 18.11 Data Table Location for Bi Directional Block Transfer R W 1 1 013 RW 1 2 3 0 1 2 3 0 Block Transfer Write 030 031 030 G 130 031 G 130 130 G 050 131 G 060 06 013 07 030 16 050 060 Block Transfer Read 013 031 17 1 1 113 0 5 0 0 6 0 130 131 5 words of data are to be written to the bi directional block transfer module starting from word 0508.
Chapter 18 Block Transfer Of these support rungs, buffering data must be programmed to ensure the block transfer data is valid. Other techniques, such as an Immediate Output instruction or a scan monitor, can also be programmed. The IOT instruction requests a block transfer more than once per scan by assigning it the output word address corresponding to the module’s location. Program the IOT rung immediately following the block transfer rung.
Chapter 18 Block Transfer Figure 18.12 Loading Zeros R 1 W 011 012 1 1 1 0 030 1 0 2 0 0 0 031 032 Block Transfer Data (Read) 050 060 Block Transfer Data (Write) 111 1 1 070 G 000 030 G 110 031 G 120 112 0 5 0 130 0 6 0 131 Bit 6 of 7 if a successful block transfer occurred.
Chapter 18 Block Transfer Setting the Number of Words to Transfer Each block transfer module has a default value that specifies the maximum number of words that can be transferred. Either the default value or some lesser value can be selected. For bi-directional block transfers, use the default value of the module. The default value varies from one kind of module to another, consult the appropriate module documentation for specifics.
Chapter 18 Block Transfer For example, 5 words can be transferred by setting bits 00 and 02 high unconditionally in output image table word 014. The binary equivalent of 5, as stated in the look-up table, is 000101.
Chapter 19 Data Transfer File Instructions Chapter Objectives This chapter describes the data transfer file instructions: File-to-File Move Word-to-File Move File-to-Word Move Figure 19.
Chapter 19 Data Transfer File Instruction The word address defines: the location in the data table to which or from which the data will be moved. this word address can be manipulated by ladder diagram logic File to File Move Instruction This instruction copies a source file and transfers it to the destination file address. It is programmed as an output instruction and requires 5 words of the user program area. The source file remains intact. The counter is incremented internally by the instruction.
Chapter 19 Data Transfer File Instuction Figure 19.
Chapter 19 Data Transfer File Instruction When the rung condition goes false, both the done and enable bits are reset and the counter resets to position 001. If the rung was enabled for only one scan, the done bit would come on during that scan and remain set for one additional scan. Distributed Complete Mode of Operation In the distributed complete mode, the rate per scan is less than the file length value and the entire file is transferred over several program scans.
Chapter 19 Data Transfer File Instuction Table 19.A Modes of Operation Mode of Operation R = Rate Per Scan Number of Words Operated Upon Complete R = File Length Entire file per scan Distributed complete 0
Chapter 19 Data Transfer File Instruction Keystrokes Enter a File-to-File Move instruction by performing the following steps. BLOCK XFER 0 SEARCH 592 FILE Block Transfer 0 appears in the lower left corner of the screen, above the processor’s current programming mode. The word SEARCH appears in the lower left corner of the Industrial Terminal Screen. Puts the processor in the remote mode. The word FILE appears in the lower left corner of the Industrial Terminal Screen.
Chapter 19 Data Transfer File Instuction 200 FILE TO FILE MOVE COUNTER ADDR: 030 POSITION: 001 FILE LENGTH: 001 FILE A: 110- 110 FILE R: 110- 110 RATE PER SCAN: 001 200 EN 17 200 DN 15 Now the cursor is on the first digit of the file length. 007 FILE TO FILE MOVE COUNTER ADDR: 200 POSITION: 001 FILE LENGTH: 001 FILE A: 110- 116 FILE R: 110- 116 RATE PER SCAN: 007 200 EN 17 200 DN 15 The cursor moved to the first digit of file A.
Chapter 19 Data Transfer File Instruction FILE TO FILE MOVE COUNTER ADDR: 200 POSITION: 001 FILE LENGTH: 007 FILE A: 400- 406 FILE R: 500- 506 RATE PER SCAN: 007 007 200 EN 17 200 DN 15 You can now proceed to add data to your file. Position your cursor on the words file to file move. Use the arrow keys to move your cursor. For this example, we will use the hexadecimal data monitor display. The screen does not change.
Chapter 19 Data Transfer File Instuction Important: If you made a mistake, you can correct it by moving the cursor left or right to the incorrect number and then pressing the correct number key.
Chapter 19 Data Transfer File Instruction Proceed by loading each position of file A with following data: Position 003 Position 004 Position 005 Position 006 Position 007 0879 0162 1982 9715 5761 Important: You do not have to enter data in each position. You can skip position numbers. All the data for file A is entered. CANCEL COMMAND The File-to-File Move instruction rung is displayed. The word SEARCH appears in the lower left corner of the industrial terminal screen.
Chapter 19 Data Transfer File Instuction Editing in a Completed Rung Edit a File-to-File Move instruction by performing the following steps in the hexadecimal data monitor display. CANCEL COMMAND The FILE TO FILE MOVE instruction rung is displayed. The word SEARCH appears in the lower left corner of the industrial terminal screen. SEARCH 592 Puts the processor in the run/program mode. DISPLAY The word DISPLAY appears in the lower left corner of the industrial terminal screen.
Chapter 19 Data Transfer File Instruction We will change the data in the command buffer from 0162 to 0281.
Chapter 19 Data Transfer File Instuction Word to File Move Instruction This instruction duplicates and transfers the data of a word from the data table to a specified word within your destination file. Here are some characteristics of a Word-to-File Move: Programmed as an output instruction; requires four words of the user program area. Your program must externally index the counter.
Chapter 19 Data Transfer File Instruction Keystrokes Enter a Word-File Move instruction by performing the following steps. First, enter a conditioned rung with a CTU instruction for 030. FILE 030 CTU PR 001 AC 001 11 FILE TO FILE MOVE COUNTER ADDR: 030 POSITION: 001 FILE LENGTH: 001 WORD ADDR: 010 FILE R: 110- 110 030 EN 15 The word FILE appears in the lower left corner of the industrial terminal screen.
Chapter 19 Data Transfer File Instuction When the rung becomes: True False The data of a word is transferred from File A to a designated (output) word address. No action is taken. ATTENTION: The counter address for the Word-to-File Move and the File-to-Word Move instructions should be used only for the intended instruction and the corresponding instructions which manipulate the accumulated value. Do not inadvertently manipulate the preset or accumulated word.
Chapter 19 Data Transfer File Instruction Here is an explanation of each value: Data Monitor Display This Value: Stores This: Counter address Address of the instruction's file position in the accumulated value area of the data table. Position Current word being operated upon (accumulated value of the counter). File Length Number of words in file (preset value of the counter). File A Starting address of the source file. Word Address Address of the destination (output) word outside of the file.
Chapter 19 Data Transfer File Instuction Figure 19.
Chapter 19 Data Transfer File Instruction Table 19.B Data Monitor Functions Display [DISPLAY] [0] Any Displays the binary data monitor Print [DISPLAY] [0] [RECORD] Any Prints the first 20 lines of binary data monitor. Display [DISPLAY] [1] Any Displays the hexadecimal data monitor Print [DISPLAY] [1] [RECORD] Any Prints the first 20 lines of hexadecimal data monitor.
Chapter 20 Bit Shift Registers Chapter Objectives This chapter describes bit shift instructions. The bit shift instructions are: The Bit Shift Left or Right instructions move one bit to the left or right upon the false-true transition of a rung. They are output instructions that construct and manipulate a synchronous bit shift register from 1-999 bits in length. You can perform these operations only in the complete mode.
Chapter 20 Bit Shift Registers Figure 20.
Chapter 20 Bit Shift Registers If the bit shift register of Figure 20.1 is 123 bits long, shifting ends at bit 12 of word 407. In this case, bits to the left of bit 12 in word 407 are not used for the bit shift register. However, they cannot be used for any other purpose. The value in bit 123 is shifted directly into output bit B when a bit shift occurs as shown by the dotted line in Figure 20.1. The instruction operates in the complete mode.
Chapter 20 Bit Shift Registers A display represented by Figure 20.2 shows the format of a Bit Shift Left. Figure 20.2 Bit Shift Left Format 020 BIT SHIFT LEFT COUNTER ADDR: 030 NUMBER OF BITS: 001 FILE: 110-110 INPUT: 010/00 OUTPUT: 010/00 10 030 EN 17 030 DN 15 Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table. Initially displayed default values are governed by the I/O rack configuration.
Chapter 20 Bit Shift Registers Bit Shift Right The Bit Shift Right output instruction constructs a synchronous bit shift register from 1 to 999 bits in length. Figure 20.4 shows a 128 bit register starting and ending at words 400 and 407. Figure 20.
Chapter 20 Bit Shift Registers Upon false-to-true rung transition, input bit B from a particular input word will be inserted into the last bit of the bit shift register. In Figure 20.4, bit 128 moves right and displaces bit 127; bit 127 displaces bit 126. Each bit displaces the one on its right until the first bit in the word, 113, is reached. Bit 113 then displaces bit 112 in the previous word (in this example, bit 406/17).
Chapter 20 Bit Shift Registers To program a Bit Shift Right instruction: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen. 13 020 10 BIT SHIFT LEFT COUNTER ADDR: 030 NUMBER OF BITS: 001 FILE: 110-110 INPUT: 010/00 OUTPUT: 010/00 030 EN 17 030 DN 15 The format that appears and the technique for insertion of numbers, will be identical to that for Bit Shift Left except that the title will read Bit Shift Right. The instruction should look like Figure 20.5: Figure 20.
Chapter 20 Bit Shift Registers Here are some characteristics of an Examine Off Bit Shift instruction: Program as an input instruction Key sequence [Shift] [Reg] [1] [8] Requires 3 words of your program Programming an Examine Off Bit Shift Instruction To program an Examine Off Bit Shift: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen. 070 EXAMINE OFF SHIFT BIT 18 FILE: BIT NO. 00 110 001 A display represented by Figure 20.6 shows the format of an Examine Off Bit Shift.
Chapter 20 Bit Shift Registers After you have entered the following conditions: The file starts at word 400 Bit number 67 is for an off (0) condition The instruction should look like Figure 20.7. Figure 20.7 Examine Off Bit Shift Example Rung 070 EXAMINE OFF SHIFT BIT FILE: BIT NO. Examine On Bit Shift 00 400 067 This condition instruction examines a user specified bit in a bit shift register, such as shown in Figure 20.1 or Figure 20.4, for an On (1) condition.
Chapter 20 Bit Shift Registers Programming an Examine On Bit Shift Instruction To program an Examine On Bit Shift Instruction: The prompt SHIFT REGISTER 12 appears in the lower left hand corner of the screen. 070 EXAMINE ON SHIFT BIT 19 00 FILE: BIT NO. 110 001 A display represented by Figure 20.8 shows the format of an Examine On Bit Shift. Figure 20.8 Examine On Bit Shift Format EXAMINE ON SHIFT BIT FILE: BIT NO. 110 001 Numbers shown are default values.
Chapter 20 Bit Shift Registers The instruction should look like Figure 20.9: Figure 20.9 Examine On Bit Shift Example Rung 070 EXAMINE ON SHIFT BIT FILE: BIT NO. Set Bit Shift 00 400 067 The Set Bit Shift output instruction sets a specified bit in a bit shift register. You specify the bit number of the bit to be set and the starting address of the file. The instruction executes upon a true rung condition.
Chapter 20 Bit Shift Registers A display represented by Figure 20.10 shows the format of a Set Bit Shift. Figure 20.10 Set Bit Shift Format SET SHIFT BIT FILE: BIT NO. 110 001 Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table. Initially displayed default values are governed by the I/O rack configuration. This Value: Stores This: File Starting address of the file (file of bit shift instruction).
Chapter 20 Bit Shift Registers Reset Bit Shift The Reset Shift Bit output instruction turns off a specified bit in a bit shift register. You specify the bit number of the bit to be turned off and the starting address of the file. The instruction executes upon a true rung condition. Important: If file is shifted, new data in the same bit position will be reset if the Reset Shift Bit rung is still true.
Chapter 20 Bit Shift Registers A display represented by Figure 20.12 shows the format of a Reset Bit Shift. Figure 20.12 Reset Bit Shift Format RESET SHIFT BIT FILE: BIT NO. 110 001 Numbers shown are default values. The number of default address digits initially displayed, 3, 4, or 5 will depend on the size of the data table. Initially displayed default values are governed by the I/O rack configuration. This Value: Stores This: File Starting address of the file (file of bit shift instruction).
Chapter 21 Sequencers Chapter Objectives This describes the three types of sequence instructions: sequencer input sequencer output sequencer load These instructions either transfer information from the data table to output word addresses, compare I/O word information with information stored in tables, or transfer I/O word information into the data table. Comparison with File Instructions Sequencer instructions are similar to file instructions but have some marked differences.
Chapter 21 Sequencers Figure 21.
Chapter 21 Sequencer Figure 21.3 Masking Transfer Data Sequencer Word (Current Step) 0 1 0 1 1 0 1 0 Mask Word 1 0 0 1 1 0 0 1 Output Word prior to Sequencer Operations 1 1 1 0 1 0 0 0 Output word result after Sequencer Operations 0 1 1 1 1 0 0 0 10393-I Other instructions can change a mask in the user program. If a changing mask is required for different steps in the sequencer operation, a Get/Put or file move can be used.
Chapter 21 Sequencers Figure 21.4 Sequencer Instructions Key Sequence SEQ 0 SEQ 1 SEQ 2 1770 T3 Display SEQUENCER OUTPUT COUNTER ADDR: 030 CURRENT STEP: 001 SEQ LENGTH: 001 WORDS PER STEP: 1 FILE: 110- 110 MASK: 010- 010 OUTPUT WORDS 2: 1: 010 3: 4: 030 EN 17 030 DN 15 LOAD WORDS 1: 010 3: 030 000 001 1 110 Output instruction Increments, then transfers data. Same data transferred each scan that the rung is true. Counter is indexed by the instruction. Unused output bits can be masked.
Chapter 21 Sequencer Sequencer Input The Sequencer Input instruction compares all 16 bits of input data to data stored in its file (data table) for equality. Here are some characteristics of the sequencer input instruction. You can compare up to 64 bits. This instruction is programmed as an input instruction (can be programmed in the same rung as a sequencer output instruction). You can mask the unused input bits.
Chapter 21 Sequencers The cursor moves to the digit 4 and DATA TABLE SIZE changes to 512. This gives you a 512 word data table. After you adjust the data table press CANCEL COMMAND. You are now ready to insert this program.
Chapter 21 Sequencer The instruction should look like this: SEQUENCER INPUT COUNTER ADDR: CURRENT STEP: SEQ LENGTH: WORDS PER STEP: FILE: 400MASK: 070INPUT WORDS 2: 1: 110 3: 4: 200 001 006 2 413 071 201 To continue, enter your data using the binary data monitor mode. You will get your data from the worksheet in Figure 21.5. A filled in block means that a 1 should be inserted in the corresponding bit position.
Chapter 21 Sequencers Figure 21.
Chapter 21 Sequencer Start by positioning your cursor on the words SEQUENCER INPUT. Use the arrow keys to move the cursor. DISPLAY 0 The word display appears in the lower left hand corner of the screen.
Chapter 21 Sequencers INSERT BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 400- 413 201 OUTPUT ADDR: 110 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 070 071 DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 001 00000010 00000000 00000000 00000000 002 00000000 00000000 00000000 00000000 003 00000000 00000000 00000000 00000000 004 00000000 00000000 00000000 00000000 005 00000000 00000000 00000000 00000000 006 00000000 00000000 00000000 00000000
Chapter 21 Sequencer INSERT ↓ ↓ BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 600- 613 013 OUTPUT ADDR: 012 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 075 076 DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 001 00000010 00000000 00000000 00000000 002 00000010 00000001 00000000 00000000 003 00000000 00000000 00000000 00000000 004 00000000 00000000 00000000 00000000 005 00000000 00000000 00000000 00000000 006 00000000 00000000 00000000 00000
Chapter 21 Sequencers 000 BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 400- 413 201 OUTPUT ADDR: 110 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 070 071 DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 001 00000010 00000000 00000000 00000000 002 00000010 00000001 00000000 00000000 003 00000010 00010001 00000000 00000000 004 00000010 00010001 00000000 00000000 005 00000010 01000001 00000000 00000000 006 00000010 00000000 00000000 00000000 DAT
Chapter 21 Sequencer SHIFT CANCEL COMMAND Sequencer Output BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 400- 413 201 OUTPUT ADDR: 110 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 070 071 DATA: 00000010 01010001 00000000 00000000 STEP WORD 1 WORD 2 001 00000010 00000000 00000000 00000000 002 00000010 00000001 00000000 00000000 003 00000010 00010001 00000000 00000000 004 00000010 00010001 00000000 00000000 005 00000010 01000001 00000000 00000000 006 0000
Chapter 21 Sequencers ATTENTION: The counter address for the Sequencer Output instruction should be reserved for that instruction. Do not manipulate the counter accumulated or preset values. Inadvertent changes to these values could result in hazardous machine operation or a RUN TIME ERROR. Damage to equipment and/or personal injury could result. You are now ready to insert this instruction. The word SEQUENCER appears in the lower left hand corner of the screen.
Chapter 21 Sequencer Your sequencer output instruction should look like this: SEQUENCER INPUT COUNTER ADDR: CURRENT STEP: SEQ LENGTH: WORDS PER STEP: FILE: 400MASK: 070INPUT WORDS 2: 1: 110 3: 4: 200 001 006 2 413 071 201 SEQUENCER INPUT COUNTER ADDR: CURRENT STEP: SEQ LENGTH: WORDS PER STEP: FILE: 600MASK: 075INPUT WORDS 2: 1: 012 3: 4: 200 001 006 2 613 076 200 EN 17 200 DN 15 013 To continue, enter your data using the binary data monitor mode.
Chapter 21 Sequencers Figure 21.
Chapter 21 Sequencer Start by positioning your cursor on the words SEQUENCER OUTPUT. Use the arrow keys to move the cursor. DISPLAY 0 The word DISPLAY appears in the lower left hand corner of the screen.
Chapter 21 Sequencers INSERT BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 600- 613 013 OUTPUT ADDR: 012 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 075 076 DATA: 00000000 00000000 00000000 00000000 STEP WORD 1 WORD 2 001 00000000 00001010 00000000 00000000 002 00000000 00000000 00000000 00000000 003 00000000 00000000 00000000 00000000 004 00000000 00000000 00000000 00000000 005 00000000 00000000 00000000 00000000 006 00000000 00000000 00000000 00000000
Chapter 21 Sequencer Cursor down one line. The cursor is on the last digit of DATA of the third word in the command buffer. The digits in step 3 for word 3 are intensified. ↑↑ Continue adding your data: 003: 00001000 00100010 004: 00100000 00100010 005: 00000000 00100010 006: 00000010 00001010 To add data to WORD 2 press [Shift] [→] and cursor up or down as needed. Do not press [Cancel Command]. We will use the display to add a mask.
Chapter 21 Sequencers INSERT CANCEL COMMAND Sequencer Load BINARY DATA MONITOR SEQUENCER OUTPUT STEP: 001 SEQUENCER LENGTH: COUNTER ADDR: 200 FILE: 600- 613 013 OUTPUT ADDR: 012 DATA: 00000000 00000000 00000000 00000000 MASK ADDR: 075 076 DATA: 00101010 10101010 00000000 00000000 STEP WORD 1 WORD 2 001 00000000 00001010 00000000 00000000 002 00000000 00001010 00000000 00000000 003 00001000 01000001 00000000 00000000 004 00100000 00010010 00000000 00000000 005 00000000 00100010 00000000 00000000 006 0000
Chapter 21 Sequencer ATTENTION: The counter address of the sequencer load instruction should be reserved for that instruction. Do not manipulate the counter accumulated or preset word. Changes to these values could result in unexpected machine operation with damage to equipment and injury to personnel. You are now ready to program your sequencer load instruction. The word SEQUENCER is displayed in the lower left corner of the screen.
Chapter 21 Sequencers Figure 21.
Chapter 21 Sequencer Load your data from Figure 21.6 exactly as you did in the Sequence Input and Output instructions. CANCEL COMMAND To display your rung. Your Sequencer Load instruction should look like this.
Chapter 22 Selectable Timed Interrupt Chapter Objectives This chapter describes a method to execute subroutines at timed intervals. This method is called selectable timed interrupt (STI). Introduction A selectable timed interrupt is a special subroutine that can be programmed into the subroutine area and can be executed at timed intervals. General programming facts are: The first instruction in the first rung of the subroutine area must be a Get instruction. This identifies it as an STI.
Chapter 22 Selectable Timed Interrupt Figure 22.1 Sample Program Rungs Sample Program 047 110 15 01 RUNG 1 027 RUNG 2 02 RUNG 3 User Program 110 RUNG 4 00 110 RUNG 5 00 110 RUNG 6 00 047 RTO 1 .
Chapter 22 Selectable Timed Interrupt The processor scans the user program (rungs 1-6) until it reaches the subroutine area. The processor then identifies the subroutine area as having an STI if: 1. The STI subroutine begins in the first rung of the subroutine area 2. The first instruction of the STI rung is a Get instruction ATTENTION: The Get instruction must be used solely for the purpose of designating the time period of the STI.
Chapter 22 Selectable Timed Interrupt Operational Overview Service time (Figure 22.2b) is factory set at approximately 2/3 of the timed interrupt period. Your subroutine execution time plus program transition time (Figure 22.2c) should not exceed the maximum allowable service time (Figure 22.2b). When the program transition time plus subroutine execution time does not exceed service time, there is sufficient time for the processor to scan the subroutine. Figure 22.
Chapter 23 Report Generation Chapter Objectives This chapter describes how to generate messages containing: ASCII characters graphic characters variable information You can use the report generation function of the 1770-T3 industrial terminal to generate messages that contain ASCII and graphic characters, and variable data table information. The industrial terminal must be in the Mini-PLC-2/02, Mini-PLC-2/16, or Mini-PLC-2/17 mode.
Chapter 23 Report Generation Report Generation Commands Use the report generation commands (Table 23.A) to enter control words and to store, print, report, and delete messages and to display an index of existing messages. Table 23.A Report Generation Commands Command Enter report generation function Key Sequence Description [RECORD][DISPLAY] Set baud rate (Message Code Keys) Puts industrial terminal into report generation function. Same (entered from a peripheral device).
Chapter 23 Report Generation You must be in report generation. RECORD These lines appear in the lower left hand corner of the screen. CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear. The following messages appear in the upper left hand corner of the screen. DISPLAY SWITCH TO ALPHANUMERIC OVERLAY CONFIGURING MESSAGE AREA CONFIGURATION COMPLETE, PLEASE CONTINUE MS,0 appears on the screen.
Chapter 23 Report Generation Table 23.B Example Message Control Word and Message Number Relationship Control Words Message Numbers 200 201 202 203 204 205 206 207 010 017 110 117 210 217 310 317 410 417 510 517 610 617 710 717 Important: This table assumes user selected messages control words begin at 2008. Message Store - MS Accessible only in the Program or Remote Program mode, use this command to enter messages in memory. Access the message store command by: You must be in report generation.
Chapter 23 Report Generation Table 23.C Address Delimiters Delimiter Format Explanation Message Report Format *XXX* Enter 3 digit word address between delimiters. Displays the 3 digit BCD value at assigned word address. *XXX1* or *XXX0* Enter 3 digit word address and a 1" for upper byte or a 0" for lower byte between delimiters. Displays the 3 digit octal value at assigned byte address. Enter 5 digit bit address between delimiters. Displays the On or Off status of the assigned bit address.
Chapter 23 Report Generation The words END OF MESSAGE STORE appear on the screen. Returns the display to the ladder diagram. Message Print - MP Accessible in any mode, the message print command is to print the contents of a message to verify it. You can print a message with the following keystrokes: You must be in report generation. MP,n MP,n appears on the screen. n = message number RETURN ESC Message n appears on the screen. Returns the display to the ladder diagram.
Chapter 23 Report Generation Message Report - MR Accessible in any mode, the message report command prints a message with the current data table value or bit status that corresponds to an address between the delimiters. For example, the message report command gives the following: bit 013/05 is off and counter 030 accumulated value is 000. You must be in report generation. MR,n MR,n appears on the screen.
Chapter 23 Report Generation Message Index - MI Accessible in any mode, the message index command prints an MI list of the message numbers used and the amount of memory (in words) used for each message. In addition, the number of unused memory words available is listed. The message index command is accessed by the following keystrokes: You must be in report generation. MI MI appears on the screen. This command cannot be terminated before completion. It self-terminates after the list is completed.
Chapter 23 Report Generation Figure 23.1 Alphanumeric and Alphanumeric/Graphic Keytop Overlays MODE SELECT ' 1 ESC " 2 Q CTR # 3 W A SHIFT $ 4 E & 6 R S Z % 5 D X , 7 T F C ( 8 Y G V ) 9 U H I ] M B ALPHANUMERIC * : @ P O [ K J ^ N 0 \ L LINE FEED + ; < , > . Alphanumeric Keytop Overlay (1770-KAA) = _ RETURN RUB OUT ? / REPT LOCK SHIFT LOCK CAT. NO.
Chapter 23 Report Generation If the processor is in the Program mode, you can enter a message by executing the following steps: RECORD These lines appear in the lower left hand corner of the screen. CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear. The following messages appear in the upper left hand corner of the screen.
Chapter 23 Report Generation Manually Initiated Report Generation You can display messages manually on the T3 terminal or the peripheral device by executing a key sequence each time a message is desired. You can display a message manually by executing the following steps: RECORD These lines appear in the lower left hand corner of the screen. CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The following messages appear in the upper left hand corner of the screen.
Chapter 23 Report Generation ESC 40 The word SEARCH appears in the lower left hand corner of the screen. The words AUTOMATIC REPORT GENERATION appear across the top of the screen and appear in the lower left hand corner of the screen. The word SEARCH changes to SEARCH 40. CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD If your processor is in Program mode, the following message appears underneath the words AUTOMATIC REPORT GENERATION: PROCESSOR NOT IN RUN OR TEST MODE. Change modes and continue.
Chapter 23 Report Generation Important: Automatic report generation can also be activated automatically upon initialization of the industrial terminal if you move parity switches 4 and 5 to the up position on the industrial terminal’s main logic board (Figure 23.2). To find these switches, turn power off and remove the keyboard. Figure 23.
Chapter 23 Report Generation You can display any of the six messages when the corresponding bit 10-15 of word 027 is latched on. An example program to display one of the messages 1-6 is shown in Figure 23.4. Three programming rungs are required to display each stored message. The rungs must be programmed in the order shown. Figure 23.
Chapter 23 Report Generation You define the control word addresses that correspond to the control word number. The last three digits of the message request bit address are coded to represent a particular message. For example, message number 312 indicates the 12th bit of the 3rd control word. The message request bit address (follow the arrows in the figure above) is then 203/12. Likewise, message number 716 indicates the 16th bit of the 7th control word, with a message request bit of 207/16.
Chapter 23 Report Generation Figure 23.7 Example Program to Display Any of the Remaining 64 Messages Event 265 RUNG 1 Message (010) Request Bit 200 L 10 RUNG 2 Message (010) Request Bit 200 U 10 04 Event 265 04 Message (010) Done Bit 200 00 ATTENTION: Do not use message control words for any other purpose. This warning is especially critical for output image table locations when output or block transfer modules are placed in corresponding slots.
Chapter 23 Report Generation You can access graphic capability by executing the following keystrokes: RECORD These lines appear in the lower left hand corner of the screen. CHANNEL C: 9600 BAUD; INPUT = ON; HANDSHAKE = ON RECORD The previous messages disappear. The following messages appear in the upper left hand corner of the screen.
Chapter 23 Report Generation Table 23.D Alphanumeric/Graphic Key Definitions Key 23-18 Function [LINE FEED] Moves the cursor down one line in the same column. [RETURN] Returns the cursor to the beginning of the next line. [RUB OUT] Deletes the last character or control code that was entered. [REPT LOCK] Allows the next character that is pressed to be repeated continuously until [REPT LOCK] is pressed again. [SHIFT] Allows the next key pressed to be a shift character.
Chapter 23 Report Generation Table 23.E Industrial Terminal Control Codes Control Code Key Sequence Function [CTRL][P] [Column #][;] [Line #][A] Positions the cursor at the specified column and line number [CTRL][P][A] positions the cursor at the top left corner of the screen. [CTRL][P][F] Moves the cursor one space to the right. [CTRL][P][U] Moves the cursor one line up in the same column. [CTRL][P][5][C] Turns cursor on. [CTRL][P][4][C] Turns cursor off.
Chapter 23 Report Generation Table 23.
Chapter 23 Report Generation The 1770-T3 industrial terminal screen size is 80 columns across by 24 lines down. An example sheet for graphic programs is shown in Figure 23.8 An example message using graphic and alphanumeric characters is shown in Figure 23.9. Figure 23.
Chapter 23 Report Generation Use the control code, [CTRL] [P] [;][A] for cursor positioning to conserve memory when possible. For example, [CTRL] [P] [3] [9] [;] [9] [A] uses 3 words of memory, storing CRTL P in one byte and remaining characters in one byte each. If the cursor had been at column 0, and line 0 and normal space, and line feed commands were used, it would have taken 24 words of memory to accomplish the same thing. The column and line numbers begin at zero rather than one.
Chapter 24 Program Editing Chapter Objectives This chapter describes how to edit instructions in your program: rules for editing instructions editing relay-type instructions editing other instructions Editing a Program Changes to an existing program can be made through a variety of editing functions (Table 24.A). Instructions and rungs can be added or deleted; addresses, data, and bits can be changed.
Chapter 24 Program Editing Table 24.A Editing Functions Function Insert a condition instruction 1 Key Sequence Mode [INSERT] (instruction) (address) Program Description Position the cursor on the instruction that will precede the instruction to be inserted. Then press the key sequence. 1 2 Position the cursor on the instruction that will follow the instruction to be inserted. Then press the key sequence.
Chapter 24 Program Editing Inserting an Instruction Only non-output instructions can be inserted in a rung. There are ways of doing this: First instruction of an existing rung First instruction of another rung Another location in the rung. You insert an instruction using either of the two ways by performing the following steps. First Instruction of an Existing Rung 1. Position the cursor of the first instruction of the existing rung. 2. Press [Insert][←]. 3. Insert . 4.
Chapter 24 Program Editing If, at any time, the memory is full, a MEMORY FULL message is displayed and you cannot enter more instructions. Removing an Instruction Only non-output instructions can be removed from a rung. Output instructions can be removed only be removing the complete rung. Remove an instruction by performing the following steps. 1. Place the cursor on the instruction you are going to remove. 2. Press [Remove] . Bit values and data of word instructions are not cleared.
Chapter 24 Program Editing Removing a Rung Removing a rung is the only way an output instruction can be removed. You can remove any rung, except the last one containing the END statement. Remove a rung by performing the following steps. 1. Position the cursor anywhere on the rung you want to remove. 2. Press [Remove][Rung]. Only bits corresponding to Output Energize, Latch, or Unlatch instructions are cleared to zero. All other word and bit addresses are not cleared when a rung is removed.
Chapter 24 Program Editing Change the address of a word or block instruction by performing the following steps. 1. Position the cursor on the instruction you want to change. 2. Press [Insert]. The cursor, although not displayed, positions itself on the first data digit. Enter that digit to display the cursor. Online Data Change 3. Cursor back to the address digits using the [←] key. 4. Change
as needed. Use a leading zero if required.Chapter 24 Program Editing Important: When the memory write protect is activated, online data change is not be allowed for addresses above 177. If you attempt to change data above address 177, the industrial terminal displays the error message MEMORY PROTECT ENABLED.
Chapter 24 Program Editing Table 24.B Search Functions Function Key Sequence Mode Locate first rung of program [SEARCH][↑] Any Positions cursor on the first instruction of the program. Locate last rung of program area [SEARCH][↓] Any Positions cursor on the temporary end instruction, subroutine area boundary, or the end statement depending on the cursor's location. Press key sequence again to move to the next boundary.
Chapter 24 Program Editing Searching for Specific Instructions and Specific Word Addresses You can locate any instruction in your program by using methods described in this section. You can search for a block instruction searching for the counter address or the first entered address in the block. You can locate any instruction in your program by performing the following steps. 1. Press [Search]. 2. Insert . 3. insert . Enter leading zeros before the address if necessary.
Chapter 24 Program Editing Searching for the First Condition or Output Instruction in a Rung When the processor is operating in the Remote Program mode, you can access the first condition instruction of a rung from anywhere in the rung by performing the following steps. 1. Press [Search][←]. When the processor is not in the Program mode, the cursor moves off the screen to the left. To bring it back on the screen: 2. Press [→].
Chapter 24 Program Editing Searching for the First and Last Rung and User Boundaries You can locate the program boundaries including the first or last rung from any point in the program. Perform the following step. 1. Press [Search][↑] or [Search][↓]. The user program could contain a Temporary End instruction boundary and/or a subroutine area boundary. It always contains an END statement boundary. When you press [Search][↑], the cursor goes directly to the first rung from anywhere in the program.
Chapter 24 Program Editing Table 24.C Clear Memory Functions Function Data table clear Key Sequence Mode [CLEAR MEMORY] [7][7] (Start Address) (End Address) Remote Prog Description Displays a start address and an end address field. Start and end word addresses determine boundaries for data table clearing. [CLEAR MEMORY] Clears the data table within and including addressed boundaries. User program clear [CLEAR MEMORY] [8][8] Remote Prog Position the cursor at the desired location in the program.
Chapter 24 Program Editing Partial Memory Clear You can clear part of the program and the messages. Perform the following step. 1. press [Clear Memory] [9] [9]. The user program and messages are cleared from the cursor position which can not be on the first instruction. None of the bits in the data table are cleared. Total Memory Clear You can clear the complete memory. Perform the following steps. 1. Position the cursor on the first instruction of the program. 2. Press [Clear Memory] [9] [9].
Chapter 24 Program Editing Help Directories The 1770-T3 help directories list the functions or instructions common to a single multipurpose key such as the [Search] or [File] (Table 24.D). A master help directory is also available which lists the eight function and instruction directories for the processors and the key sequence to access them. You can display the master help directory by pressing [Help]. You can press [Help] any time during a multi-key sequence.
Chapter 24 Program Editing Online Programming Online programming allows you to change the program during machine operation (processor is operating in the Run/Program mode and memory write protect is not active). ATTENTION: Assign the task of online programming only to an experienced programmer who understands the nature of Allen-Bradley programmable controllers and the machinery being controlled. Check and re-check proposed online changes for accuracy.
Chapter 24 Program Editing The procedure for online programming in run/program mode is similar to the procedure for editing in program mode. However, the following three keys have a special purpose in online programming: [Record] [Cancel Command] [Data Init] Use the [Record] key to enter a change to your program. Once pressed, the changed program is active. Use the [Cancel Command] key to abort any online programming operation prior to pressing the [Record] key.
Chapter 24 Program Editing You must enter the data to be stored at the instruction’s address and its operating parameters when programming the following instructions: Get Equal To Less Than Timers Counters Files Sequencers The data stored at the instruction address is divided into two sections: BCD values (bits 00-13) status bits (bits 14-17) During program execution,these bits are constantly changing to reflect current states and values of program instructions.
Chapter 25 Programming Techniques Chapter Objectives This chapter describes several programming techniques: one-shot programming re-start cascading timers temperature conversions program control One Shot Programming The one-shot programming technique sets a bit for one program scan only. There are two types of one-shots: leading edge trailing edge Leading Edge One Shot A leading edge one-shot sets a bit for one scan when its input condition has made a false-to-true transition.
Chapter 25 Programming Technique When bit 112/04 makes a false-to-true transition, the one-shot bit (bit 253/00) is set on for one scan. The length of time bit 112/04 remains on and does not affect the one-shot bit due to the next two rungs. Bit 011/14 is latched when bit 112/04 is set or bit 011/14 is unlatched when 112/04 is reset. Bit 010/00 is then energized because the one-shot bit (bit 253/00) is set for that scan. During the next scan, either set of conditions prevents bit 253/00 from being set.
Chapter 25 Programming Technique Restart You may get into a situation that transfers the contents of the EEPROM into CMOS RAM memory. The data values (timers, counters and storage bits/words) that were present when the EEPROM was burned will also be transferred along with the ladder diagram. You can use either one of two methods to inhibit operation: MCR method - the processor is disabled for one scan before I/O update (Figure 25.3). Figure 25.
Chapter 25 Programming Technique The switch assembly on the I/O chassis determines how and when EEPROM to CMOS RAM transfer occurs. A transfer takes place if any change of CMOS RAM memory content occurs while the battery was being changed. If a transfer occurs (memory was altered), the data table contains the values programmed into the EEPROM. If transfer did not occur, memory did not change. The data table contains the values that existed at the time system power was removed.
Chapter 25 Programming Technique Here is an explanation of each rung: Temperature Conversions Rung 1: Free running timer. The timer done bit (030/15) is set for every 60 seconds or 1 minute intervals. Rung 2: When AC = PR (accumulated value equals preset value) of the timer, counter 031 increments. This rung counts the minutes in an hour. Rung 3: When AC=PR of counter 031, counter 032 increments. This rung counts the hours in a day.
Chapter 25 Programming Technique Figure 25.6 Converting Temperature Values 200 G 100 203 G 900 205 G 180 210 G 212 201 G 009 204 G 005 207 G 032 211 G 190 033 15 033 17 202 203 X X 000 900 205 206 : : 180.000 210 + 212 033 TON 1.0 PR 003 AC 000 011 15 034 CTU PR 999 AC 000 210 220 G = 212 212 011 L 16 110 011 U 16 14 Suppose that you connected a thermocouple to an input module that measures Celsius temperature. A block transfer read transfers the temperature into the processor’s data table.
Chapter 25 Programming Technique Here is an explanation of each rung: Rung 1: The Get instruction at address 201 multiplies the value of 100oC by 9 and stores 900 at address 203. Rung 2: The Get instruction at address 204 divides 5 into 900 and stores the quotient, 180, in address 205. Rung 3: The Get instruction at address 207 adds 32 to the value 180 which is located at get addresses 205. The sum of 212 is stored at address 210. Thus 100oC = 212oF.
Chapter 25 Programming Technique Figure 25.7 Recording Temperature Values Every 5 Seconds 030 030 TON 1.0 PR 005 AC 000 02 JSR 15 030 15 SUBROUTINE AREA 06 200 201 LBL G G 100 009 203 204 G G 900 005 205 207 G G 180 032 202 203 X X 000 900 205 206 : : 180.000 210 + 212 RET Here is an explanation of each rung: Rung 1: When rung 1 is true, the timer (this is an example of a free running timer) starts.
Chapter 25 Programming Technique Program Control This application illustrates the program control instructions, master control reset (MCR) and zone control last state (ZCL) (Figure 25.8). Figure 25.8 Program Control 110 MCR 17 110 011 15 16 Master Control Reset 110 MCR ZCL 17 110 011 16 15 ZCL Zone Control Last State Before you program these two instructions, you must think about how you would want outputs to react when you change the process or operation.
Chapter 26 Program Troubleshooting Chapter Objective This chapter describes special troubleshooting technique: run time errors bit monitor/manipulation contract histogram force functions temporary end instruction ERR message for an illegal opcode Run Time Errors The processor and the 1770-T3 Industrial Terminal can diagnose certain errors that occur during the execution of your program.
Chapter 26 Program Troubleshooting Diagnosing a Run Time Error The following steps help you diagnose run time errors: 1. Connect your industrial terminal to the processor. 2. Turn on the industrial terminal and notice the message, PLC-2 RUN-TIME ERROR. Press [1] [1] to continue. If the industrial terminal is already connected, then your ladder diagram is replaced by the display showing the run time error message on the mode selection screen. 3.
Chapter 26 Program Troubleshooting Bit Monitor/Manipulation The bit monitor allows the status of all 16 bits of any data table word to be displayed. Bit manipulation allows data table bits to be selectively changed and is useful in setting initial conditions in the data of word instructions. Bit Monitor Function The bit monitor can function when the processor is operating in any mode. By pressing [Search] [5] [3] , the status of all 16 bits of the desired word is displayed.
Chapter 26 Program Troubleshooting Data table bits, excluding those in the processor work area can be accessed by the contact histogram command. The on/off status of the bit and the length of time the bit remained on or off (in hours, minutes and seconds) is displayed on the Industrial Terminal. The seconds are displayed within 0.01 second (10 ms) resolution. Two operating modes for the contact histogram shown in Table 26.B are: Continuous: Accessed by pressing [Search] [6].
Chapter 26 Program Troubleshooting Figure 26.1 Contact Histogram Display hr.mn.sec. OFF or ON 00:00'00.00 ON 00:00:00.00 OFF 00:00:00.00 ON 00:00:00.00 On Time Off Time On Time If the bit is changing states faster than can be printed or displayed, a buffer stores these changes. If the buffer becomes full, all monitoring stops and a BUFFER FULL message is displayed.
Chapter 26 Program Troubleshooting Using a Force Function You can use force functions in either of two ways using: bit manipulation/monitor display of an I/O word ladder diagram display of user program By pressing [Search] [5] [3]
, the bit status and force status of the 16 corresponding input bits or output terminals of the desired word is displayed. use the [→] and [←] keys to cursor to the desired bit.Chapter 26 Program Troubleshooting ATTENTION: When an energized output is being forced off, keep personnel away from the machine area. Accidental removal of force functions instantly energizes the output device. Injury to personnel near the machine could result.
Chapter 26 Program Troubleshooting Second Method (Entering from the Remote Program or Program mode) 1. Cursor to the first rung of the main program to be made inactive. 2. Position the cursor on the first instruction in the rung. 3. Press [Insert] [←] [T. End]. Removing a Temporary End Instruction Remove a Temporary End instruction by performing the following steps. 1. Position the cursor on the Temporary End instruction you are going to remove. 2. Press [Remove] [T. End].
Chapter 26 Program Troubleshooting Testing Your Program This is the last phase of testing needed to help ensure proper start-up. ATTENTION: Only trained personnel should conduct this test. Have a trained person at appropriate emergency stop switches to de-energize output devices that could cause hazardous operation. To test your program do the following: 1. Connect the industrial terminal to your processor 2. Press [Search] [5] [9] [2] to select the Remote Program mode. 3. Enter your program. 4.
Chapter 26 Program Troubleshooting ERR Message for an Illegal Opcode An illegal opcode is an instruction code that theprocessor does not recognize. It causes a run time error. Important: The illegal opcode ERR message should not be confused with ERR messages caused when a 1770-T1 or 1770-T2 industrial terminal is connected to a processor that was using a 1770-T3 industrial terminal.
Appendix A Specifications Mini PLC 2/02 Processor without a power supply (1772 LZ) Location Mini PLC 2/16 Processor without a power supply (1772 LX) Mini PLC 2/17 Processor without a power supply (1772 LW) 1771 I/O chassis left most slot Backplane Current 1.
Appendix A Specifications Mini PLC 2/02 Processor with a power supply (1772 LZP) Mini PLC 2/16 Processor with a power supply (1772 LXP) Mini PLC 2/17 Processor with a power supply (1772 LWP) These processors have the same features as above and they also have a self contained power supply Input Voltage 120/220 V ac (switch selectable) Input Voltage Range 97 to 132 V ac 194 to 264 V ac Nominal Input Power 96 VA Frequency Output Current to Backplane Keying (top connector) A-2 47 to 63 Hz 4A Between
Appendix B Processor Comparison Chart Mini PLC 2 LN3 Mini PLC 2/15 LV Memory 1K I/O (Typical Maximum) Keyswitch Mini PLC 2/05 LS LSP Mini PLC 2/02 LZ LZP Mini PLC 2/16 LX LXP Mini PLC 2/17 LWP LW 2K 3K 3K 2K 2K 4K 4K 7.75K 7.
Appendix B Processor Comparison Chart Mini PLC 2 LN3 Mini PLC 2/15 LV Natural Log Base 10 Log AF4 Reciprocal Sin Cos Square Root AF4 File Search Diagnostic AF3 Mini PLC 2/05 LS LSP Sq Rt Sq Rt • • Mini PLC 2/02 LZ LZP Mini PLC 2/16 LX LXP Mini PLC 2/17 LWP LW Log(10) Log(10) Log(10) Log(10) • • no recip no recip no recip no recip • • • • • • • • Bit Shift • • • • • • FIFO Load/Unload • • • • • • • • STI PID B-2
Appendix C Number Systems Objectives This appendix describes the four numbering systems the processor uses: decimal octal binary hexadecimal These numbering systems differ by their number sets and place values. Decimal Numbering System Timers, counters and math operations word values use the decimal numbering system. This is a numbering system made up of ten digits: the numbers 0 through 9 (Table C.A). All decimal numbers are composed of these digits.
Appendix C Number Systems Figure C.1 Decimal Numbering System 2 x 101 = 20010 200 3 x 101 = 3010 30 9 x 100 = 9 2 3 9 10 9 23910 10 10404-I Octal Numbering System Byte word values use the octal numbering system. This is a numbering system made up eight digits: the numbers 0 through 7 (Table C.A). All octal numbers are composed of theses digits. The value of an octal number depends on the digits used and the place value of each digit.
Appendix C Number Systems Binary Numbering System Binary numbering is used in all digital systems to store and manipulate data. This is a numbering system made up of two numbers: 0 and 1 (Table C.A). All binary numbers are composed of these digits. Information in memory is stored as an arrangement of 1 and 0. The value of binary number depends on the digits used and the place value of each digit.
Appendix C Number Systems Figure C.
Appendix C Number Systems Binary Coded Octal System The binary coded octal (BCO) format expresses an octal value as an arrangement of binary digits (eight bits or one byte). The 8 bits are broken down into three groups: 2 bits, 3 bits, and 3 bits. The first group of binary digits is used to represent an octal number from 0 to 3; the other two groups represent an octal number from 0 to 7. All BCO numbers are composed of these digits.
Appendix C Number Systems Figure C.
Appendix D Glossary Introduction To help build a common understanding of processor terminology, this glossary lists those terms and abbreviations used in this manual to describe and identify various Allen-Bradley processor system components and functions. Each term in this glossary is concisely defined. These definitions provide a basis for understanding Allen-Bradley processors. In cases where a term may have more than one meaning, we give only those definitions directly related to our products.
Appendix D Glossary Analog Output Module A module that outputs a signal proportional to a number transferred to the module from the processor. Arithmetic Capability The ability to do addition, subtraction, multiplication, division, and other advanced math functions with the processor. ASCII American Standards Code for Information Interchange. It is a 7-bit code with an optional parity bit used to represent alphanumerics, punctuation marks, and control code characters.
Appendix D Glossary Binary Coded Decimal (BCD) A numbering system used to express individual decimal digits (0-9) in 4-bit binary notation. Binary Word A related group of ones and zeros that has meaning assigned by position, or by numerical value in the binary system of numbers. Bit (Binary digit) The smallest unit of information in the binary numbering system. Represented by the digits 0 and 1. The smallest division of a programmable controller word.
Appendix D Glossary Burn-In The operation of a unit, at elevated temperatures, prior to its application with the objective of stabilizing its characteristics and detecting early failures. Bus (1) One or more conductors considered as a single identity that interconnect various parts of a system. For example, a data bus or address bus. (2) An electrical channel used to send or receive data. Byte Eight consecutive bits.
Appendix D Glossary CMOS Complementary Metal Oxide Semiconductor circuitry. See MOS. Command A function initiated by a user action. Communication Rate See Baud Compatibility (1) The ability of various specified units to replace one another, with little or no reduction in capability. (2) The ability of units to be interconnected and used without modification.
Appendix D Glossary CRT Terminal A terminal containing a cathode ray tub that displays user programs and information. Cursor (1) The intensified or blinking element in the user program or file display. (2) A means for indicating on a CRT screen where data entry or editing occurs. Cycle (1) A sequence of operations that is repeated regularly. (2) The time it takes for one such sequence to occur. D Data A general term for any type of information. Data Address A location in memory where data can be stored.
Appendix D Glossary Diagnostic Program A user program designed to help isolate hardware malfunctions in the programmable controller and application equipment. Diagnostics Pertains to the detection and isolation of an error malfunction. Digital Information presented in a discrete number of codes. Display The image which appears on a CRT screen or on other image projection systems.
Appendix D Glossary Environment In a systems context, the environment is anything that is not a part of the system itself. Knowledge about the environment is important because of the effect it can have on the system or because of possible interactions between the system and the environment. EPROM Erasable Programmable Read Only Memory. A PROM that can be erased with ultraviolet light, then reprogrammed with electrical pulses. ERR See Error Message.
Appendix D Glossary File (1) One or more data table words used to store related data. See File Organization. (2) A collection of related records treated as a unit. The records are organized or ordered on the basis of some common factor called a key. Records may be fixed or vary in length and can be stored in different devices and storage media. File Address The data table address of a file that determines to where, or from where, data will be transferred or moved.
Appendix D Glossary H Hardware The mechanical, electrical, and electronic devices which compose a programmable controller and its application Header Rung The first level of a ladder diagram program. It is a requirement when programming PLC-2 family processors or on the Data Highway. Hexadecimal Numbering System A base-16 numbering system that uses the symbols 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, and A, B, C, D, E, F. High=True A signal type where the higher of two voltages indicates a logic state of On (1).
Appendix D Glossary Interlock A device actuated by the operation of some other device to which it is associated, to govern the succeeding operation of the same or allied devices. I/O Input/Output I/O Channel A data transmission link between a processor scanner module and an I/O adapter module. I/O Chassis See chassis I/O Module A device that interfaces between the user devices and the processor. I/O Rack See Rack. I/O Scan Time The time required for the processor to monitor inputs and control outputs.
Appendix D Glossary L Ladder Diagram An industry standard for representing control systems. Ladder Diagram Programming A method of writing a user program in a format similar to a relay ladder diagram. Language A set of symbols and rules used for representing and communicating information. Latching Relay A relay that maintains a given position by mechanical or electrical means until released mechanically or electrically.
Appendix D Glossary Load (1) The power used by a machine or apparatus. (2) To place data into an internal register under program control. (3) To place a program from an external storage device into central memory under operator control. Load Resistor A resistor connected in parallel with a high impedance load so the output circuit driving the load can provide at least the minimum current required for proper operation.
Appendix D Glossary M Master A device used to control secondary devices. Master Control Relay (MCR) A mandatory hardwired relay that can be de-energized by any series-connected emergency stop switch. Whenever the master control relay is de-energized, its contacts open to de-energize all application I/O devices. Master Control Reset (MCR) See MCR Zones MCR Zones User program areas where all non-retentive outputs can be turned off simultaneously.
Appendix D Glossary Module Addressing A method of identifying the I/O modules installed in a chassis. Module Group Adjacent I/O modules which relate 16 I/O terminals to a single 16-bit image table word. Module Slot A location for installing an I/O module. Monitor (1) A CRT display. (2) To observe an operation. Monitoring Controller Used in an application where the process is continually checked to alert the operator of possible application malfunctions.
Appendix D Glossary N National Bureau of Standards (NBS) An organization under the United States Department of Commerce responsible for developing and disseminating federal standards in many areas. National Electrical Code (NEC) A set of regulations governing the construction and installation of electrical wiring and apparatus, established by the National Fire Protection Association and suitable for mandatory application by governing bodies exercising legal jurisdiction.
Appendix D Glossary O Octal Numbering System A numbering system that uses only the digits 0 through 7. Also called base-8. Off Line Equipment or devices that are not connected to, or do not directly communicate with, the central processing unit. On Line Equipment or devices which communicate with the device it is connected to. Online Data Change Allows the user to change various data table values using a peripheral device while the application is operating normally.
Appendix D Glossary P Parallel Operation A type of information transfer where all bits, bytes, or words are handled simultaneously. Parallel Output Simultaneous availability of two or more bits, channels, or digits. Parallel Transmission The simultaneous transmission of bits which constitute a character. Parity The use of a self-checking code employing binary digits in which the total number of ones is always even or odd.
Appendix D Glossary Program A set of instructions used to control a machine or process. Program Scan Time The time required for the processor to execute the instructions in the program. The program scan time may vary depending on the instructions and each instruction’s status during the scan. Program Storage The portion of memory reserved for saving programs, routines, and subroutines.
Appendix D Glossary R Rack An addressing concept equivalent to 128 discrete I/O. Rack Fault (1) A red diagnostic indicator that lights to signal a loss of communication between the processor and any remote I/O chassis. (2) The condition which is based on the loss of communication. Read/Write Memory A memory where data can be stored (write mode) or accessed (read mode). The write mode replaces previously stored data with current data; the read mode does not alter stored data.
Appendix D Glossary Reply Data transmitted in response to a request. Report An application data display or printout containing information in a user-designed format. Reports could include operator messages, part records, and production lists. Initially entered as messages, reports are stored in a memory area separate from the user program. Report Generation The printing or displaying of user-formatted application data by means of a data terminal.
Appendix D Glossary State The logic 0 or 1 condition in processor memory or at a circuit input or output. Storage See Memory. Storage Bit A bit in a data table word which can be set or reset, but is not associated with a physical I/O terminal point. Subroutine A program segment in the ladder diagram that performs a specific task and is available for use. Subroutine Area (SBR) A portion of memory where subroutines are stored.
Appendix D Glossary T Tasks A set of instructions, data, and control information capable of being executed by a CPU to accomplish a specific purpose. Terminal Address A 5-digit number which identifies a single I/O terminal. It is also related directly to a specific image table bit address. Terminal Control System The operating system used to execute Grafix programs, and to perform other activities while the Advisor is on line and in use by an operator.
Appendix D Glossary Upload/Download Commonly refers to the reading/writing of programs and data tables from or into processor memory. The commands to do these processes come from some supervisory device. Upper Nibble The four most significant bits of a byte. V Variable A factor which can be altered, measured, or controlled. Variable Data Numerical information which can be changed during application operation. It includes timer and counter accumulated values, thumbwheel settings, and arithmetic results.
Appendix D Glossary Z ZCL Instructions A user-program fence for ZCL zones. ZCL Zones Assigned program areas which may control the same outputs through separate rungs, at different times. Each ZCL zone is bound and controlled by ZCL instructions. If all ZCL zones are disabled, the outputs would remain in their last state.
Appendix E Quick Reference List of References Adjusting the Data Table ................................. Block Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clearing Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Counter Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Monitor Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Appendix E Quick Reference Adjusting the Data Table E-2 For Data Table Sizes Between 48 and 26 Words Number of Timers and Counters Data Table Size Number of Timers and Counters Data Table Size Number of Timers and Counters Data Table Size 000 0048 001 002 003 004 005 0050 0052 0054 0056 0058 036 037 038 039 040 0120 0122 0124 0126 0128 071 072 073 074 075 0190 0192 0194 0196 0198 006 007 008 009 010 0060 0062 0064 0066 0068 041 042 043 044 045 0130 0132 0134 0136 0138 076 077 078 079 0
Appendix E Quick Reference For Data Table Sizes Between 384 and 7808 Words Enter Data Table Size Enter Data Table Size The Mini PLC 2/02 has this number of data table blocks. 3 4 5 6 7 8 9 384 512 640 768 896 1024 1152 10 11 12 13 14 15 1280 1408 1536 1664 1792 1920 The Mini PLC 2/16 has this additional number of data table blocks.
Appendix E Quick Reference Block Transfer Instructions BLOCK XFER Key Method Key Sequencer 1770 T3 Display BLOCK XFER 0 BLOCK XFER WRITE BLOCK XFER 1 DATA ADDR: MODULE ADDR: BLOCK LENGTH: FILE: Instruction Notes 030 100 01 110 110 BLOCK XFER READ DATA ADDR: MODULE ADDR: BLOCK LENGTH: FILE: BLOCK XFER 0 031 100 01 110 110 BLOCK XFER WRITE DATA ADDR: 030 MODULE ADDR: 110 BLOCK LENGTH: 05 FILE: 200- 204 BLOCK XFER READ DATA ADDR: 031 MODULE ADDR: 110 BLOCK LENGTH: 05 FILE: BLOCK XF
Appendix E Quick Reference Here is an explanation of each value: This Value: Stores the: Data Address First possible address in the timer/counter accumulated value area of the data table Module Address RGS for R = rack, G = module, S = slot number Block Length Number of words to be transferred Enter 00 for default value or for 64 words File Address of the first word of the file Enable bit (EN) Automatically entered from the module address Set on when the rung containing the instruction is true
Appendix E Quick Reference Clearing Memory Function Key Sequencer Mode Description Data table clear [CLEAR MEMORY] [77] (Start Address_ (End Address) [CLEAR MEMORY] Program User program clear [CLEAR MEMORY] [88] Program Position the cursor at the desired location in the program. Clears the user program from the position of the cursor to the first boundary: i.e. temporary end, subroutine area or end statement. Does not clear data table or messages.
Appendix E Quick Reference Counter Instructions Important: The counter word address, XXX, is assigned to the counter accumulated areas of the data table. To determine which addresses are valid accumulated areas, the third digit from the right must be an even number.
Appendix E Quick Reference Data Monitor Functions E-8 Function Key Sequence Mode Display [DISPLAY] [0] Any Displays the binary data monitor. Print [DISPLAY][0] [RECORDS] Any Prints the first 20 lines of binary data monitor. Display [DISPLAY][1] Any Displays the hexadecimal data monitor. Print [DISPLAY][1] [RECORD] Any Prints the first 20 lines of hexadecimal data monitor. Display [DISPLAY][2] Any Displays the ASCII data monitor.
Appendix E Quick Reference Data Transfer File Instructions Key Sequence FILE 10 FILE 11 1770 T3 Display FILE TO FILE MOVE COUNTER ADDR: POSITION: FILE LENGTH: FILE A: FILE B: RATE PER SCAN: 030 001 003 200- 202 300- 302 003 WORD TO FILE MOVE COUNTER ADDR: 030 POSITION: 001 FILE LENGTH: 003 WORD ADDR: 010 FILE R: FILE 12 Instruction Notes POSITION: 001 FILE LENGTH: 003 WORD ADDR: Output instruction.
Appendix E Quick Reference EAF Function Numbers If you want to perform an operation of this type Use this function number The Mini PLC 2/02, Mini PLC 2/16 and Mini PLC 2/17 can perform these functions. Addition Subtraction Multiplication Division Square Root BCD to Binary Binary to BCD FIFO Load FIFO Unload Log10 Sin x Cos x 10x (01) (02) (03) (04) (05) (13) (14) (28) (29) (30) (35) (36) (37) The Mini PLC 2/17 can perform these additional functions.
Appendix E Quick Reference Editing Functions Function Insert a condition instruction Key Sequence Mode [INSERT] (instruction) (address) Program Description Position the cursor on the instruction that will precede the instruction to be inserted. Then press the key sequence. 1 2 Position the cursor on the instruction that will follow the instruction to be inserted. Then press the key sequence.
Appendix E Quick Reference Execution Times and Words Per Instruction Approximate Execution Time Per Scan and Words Per Instruction Instruction Instruction Name Symbol True average µ sec. False average µ sec.
Appendix E Quick Reference Approximate Execution Time Per Scan and Words Per Instruction (continued) Instruction Instruction Name Symbol True average µ sec.
Appendix E Quick Reference Approximate Execution Time Per Scan and Words Per Instruction (continued) Instruction Instruction Name Symbol True average µ sec. False average µ sec.
Appendix E Quick Reference Approximate Execution Time Per Scan and Words Per Instruction (continued) Instruction Instruction Name Symbol True average µ sec. False average µ sec. Words Per Instruction These EAF instructions are features of the Mini PLC 2/17 only. Set Clock Set Date Set Leap Year and Day of Week Read Clock Read Date Read Leap Year and Day of Week PID EAF 10 EAF 11 EAF 12 217 225 167 30 30 31 3 3 3 EAF 15 EAF 16 EAF 17 203 205 138 30 30 31 3 3 3 EAF 27 2450 (typical) 3500 (max.
Appendix E Quick Reference FIFO Load and FIFO Unload File Full Bit FIFO Load Conditioning Bit File Address 130 00 15 060 G 000 030 G 040 031 G 005 032 G 060 050 G 000 040 G 000 FIFO Unload Conditioning Bit 050 Input Word Address Current Data Being Loaded Input Word Address ( File Length Result Word Address (Number of Words Currently in File) 042 G 000 130 050 01 14 061 G 000 043 G 000 044 G 000 The File Output Word Address Current Data Being Unloaded FIle Enpty Bit File Address 034
Appendix E Quick Reference Graphic Programming Alphanumeric/Graphic Key Definitions Key Function [LINE FEED] Moves the cursor down one line in the same column. [RETURN] Returns the cursor to the beginning of the next line. [RUB OUT] Deletes the last character or control code that was entered. [REPT LOCK] Allows the next character that is pressed to be repeated continuously until [REPT LOCK] is pressed again. [SHIFT] Allows the next key pressed to be a shift character.
Appendix E Quick Reference ASCII Control Codes Control Code 1 1 2 3 E-18 Display 2 ASCII Mnemonic Name CTRL 0 3 NU NUL NULL CTRL A 3 SH SOH START OF HEADER CTRL B 3 SX STX START OF TEXT CTRL C 3 EX ETX END OF TEST CTRL D ET EOT END OF TRANSMISSION CTRL E EQ ENQ ENQUIRE CTRL F AK ACK ACKNOWLEDGE CTRL G BL BEL BELL CTRL H BS BS BACKSPACE CTRL I HT HT HORIZONTAL TAB CTRL J LF LF LINE FEED CTRL K VT VT VERTICAL TAB CTRL L FF FF FORM FEED CTRL M CR
Appendix E Quick Reference Help Help Directories Function Key Sequence Mode Description [HELP] Any Displays a list of the keys that are used with the [HELP] key to obtain further directories. Control function directory [SEARCH] [HELP] Any Provides a list of all control functions that use the [SEARCH] key. Record function directory [RECORD] [HELP] Any Provides a list of functions that use the [RECORD] KEY.
Appendix E Quick Reference Memory Layout To examine memory layout: SEARCH The word SEARCH appears in the lower left hand corner of the screen.
Appendix E Quick Reference Memory Structure Total Decimal Words 8 Data Table Factory Configured for 2 Slot Addressing Decimal Words Per Area 8 Word Address Processor Work Area No. 1 Output Image Table 16 8 64 72 8 40 8 Reserved 2 Timer/Counter Accumulated Values (AC) (or Bit/Word Storage) Processor Work Area No.
Appendix E Quick Reference Data Table Configured for 1 Slot Addressing Total Decimal Words Decimal Words Per Area 8 8 Word Address Bit Address 000 00 Processor Work Area No. 1 007 17 010 00 Output Image Table Rack 1 6 16 8 017 17 020 00 Output Image Table Rack 2 1 1 24 8 Reserved 2 7 64 40 Timer Counter Accumulated Values (AC) (or Bit Word Storage) 3 72 8 Processor Work Area No.
Appendix E Quick Reference Data Table Configured for 1/2 Slot Addressing Word Address Total Decimal Words Decimal Words Per Area 8 8 Processor Work Area No. 1 16 8 Output Image Table Rack 1 24 8 Output Image Table Rack 2 1 Reserved 2 6 32 8 Output Image Table Rack 3 40 8 64 24 Output Image Table Rack 4 Timer/Counter Accumulated Values (AC) 3 (or Bit/Word Storage) 72 8 Processor Work Area No.
Appendix E Quick Reference PID Control Block Control Word 01 Bit Descriptions: Status Bits 00 - Equation (Set by User) Independent Gain =0 Dependent Gain = 1 01 - Mode (Set by User) Auto = ) Manual = 1 02 - Control Action (Set by User) Direct (SP-PV) = 0 Reverse (PV-SP) = 1 03 - Output Limiting (Set by User) No - 0 Yes = 1 04 - Set Output (Set by User) Inhibited = 0 Enabled = 1 05 - Cascade Bit (Set by User) 3 No = 0 Secondary Cascade Loop = 1 06 - Derivative Uses Error (set by User) 3 P
Appendix E Quick Reference Control Word 02 Bit Descriptions: Status and SIgn Bits 00 - 01 - KP/10 (Set by User) Do not move decimal = 0 Move decimal = 1 02 - Feedforward/Bias Sign (Set by User) Pos = 0 Neg = 1 03 - Maximum Scaling Sign (Set by User) Pos = 0 Neg = 1 04 - Minimum Scaling Sign (Set by User) Pos = 0 Neg = 1 05 - Set Point Sign (Set by User) Pos = 0 Neg = 1 06 - Process Variable Sign (Set by Instruction) Pos = 0 Neg = 1 07 - Error Sign (Set by Instruction) Pos = 0 Neg = 1 10 -
Appendix E Quick Reference Words 03 through 09 All range values are unitless unless noted otherwise. Independent Gain Equation Range Range Dependent Gain Equation Word 03 0000 9999 00.00 99.99 Word 05 Range 1 2 3 E-26 Term 1/TI Range 00.00 99.99 Integral Gain Units Word 06 Unites - min 3 Feedforward - FFWD Range 1 Word 08 0000 9999 Maximum Scaling Value Word 09 0000 9999 rep/min Term TD Range 00.00 99.99 Derivative Gain Word 07 0000 4095 or 0000 FFFF 0000 9999 Range 00.00 99.
Appendix E Quick Reference Table 1.B Words 10 through 24 Independent Gain Equation Range Range Units Range Unites Range Units Range Units Range Range Range Units Dependent Gain Equation Word 10 0000 9999 Zero Crossing Dead Band Word 11 0000 100% Percent 0000 100% Set Output Value Word 12 Maximum Control Output Percent Word 13 0000 100% Minimum Control Output Percent Word 14 0000 99.
Appendix E Quick Reference PROC Indicator If the PROC indicator Green And the processor is in the Run mode operating normally • program is executing • outputs are enabled. You should No action required is in MEM STORE mode and EEPROM memory module is being programmed. The indicator will be ON for a few seconds and then then turn OFF. Blinking Green has an I/O configuration error • there is an illegal backplane switch combination (i.e.
Appendix E Quick Reference Report Generation Address Delimiters Delimiter Format Explanation Message Report Format *XXX* Enter 3 digit word address between delimiters. Displays the 3 digit BCD value at assigned word address. *XXX1* or *XXX0* Enter 3 digit word address and a 1" for upper byte or a 0" for lower byte between delimiters. Displays the 3 digit octal value at assigned byte address. Enter 5 digit bit address between delimiters.
Appendix E Quick Reference Search Search Functions Function Key Sequence Mode Locate first rung of program [SEARCH][↑] Any Positions cursor on the first instruction of the program. Locate last rung of program area [SEARCH][↓] Any Positions cursor on the temporary end instruction, subroutine area boundary, or the end statement depending on the cursor's location. Press key sequence again to move to the next boundary.
Appendix E Quick Reference Sequencer Instructions Key Sequence SEQ 0 SEQ 1 SEQ 2 1770 T3 Display SEQUENCER OUTPUT COUNTER ADDR: 030 CURRENT STEP: 001 SEQ LENGTH: 001 WORDS PER STEP: 1 FILE: 110- 110 MASK: 010- 010 OUTPUT WORDS 2: 1: 010 3: 4: 030 EN 17 030 DN 15 LOAD WORDS 1: 010 3: 030 000 001 1 110 Output instruction Increments, then transfers data. Same data transferred each scan that the rung is true. Counter is indexed by the instruction. Unused output bits can be masked.
Appendix E Quick Reference Switch Group Assembly Settings Set Switches 1, 4, 5 and 8 If you want: Then set: And Outputs to remain in their last state when a fault (red LED in ON) is detected 1 Switch 1 ON -- Outputs to de energize when a fault (red LED is ON) is detected 1 Switch 1 OFF -- 2 slot addressing 2 1 slot addressing 3 1/2 slot addressing 4 Switch 4 OFF Switch 4 OFF Switch 4 ON Switch 5 OFF Switch 5 ON Switch 5 ON Switch 8 OFF -- RAM memory protect disabled RAM memory protect e
Appendix E Quick Reference Set Switches 6 and 7 If And Then Without and EEPROM installed in your processor Switch 6 is OFF Switch 7 may be either ON or OFF With a battery installed and a program stored in RAM memory, your processor powers up in the mode identified by the position of the mode select switch. If the mode select switch is in the RP position, the processor will power up in the remote program mode.
Appendix E Quick Reference Timer Instructions Important: The timer word address, XXX, is assigned to the timer accumulated areas of the data table. To determine which addresses are valid accumulated areas, the third digit from the right must be an even number. The time base 1.0, 0.1 or 0.01 second. Preset values, YYY, and accumulated values, ZZZ, can vary from 000-999. Bit 15 is the timed bit. Bit 17 is the enable bit. The word address displayed will be 3 or 4 digits long depending on the data table size.
Appendix E Quick Reference Diagnostic Word 027 Internal Control Functions Diagnostic Word: Word 027 Bits in word 027 are used by the processor for internal control functions. This Bit: Stores this Information: 00 (Battery low) - set when the battery is low. 01 (EEPROM) - set indicates that EEPROM transferred at power up. This bit is always reset (0) when the processor powers down 02 (STI too long) - set indicates subroutine execution time plus program transition time exceed service time.
Index Numbers 1 operand EAFs, 15 1 1 slot addressing, 7 4 1/2 slot addressing, 7 5 1/2 slot addressing, 5 14 10 to the X, 14 17 1770 T3, 3 7 1770-T3, 1 2, 3 7 1771 SIM, 5 20, 5 21 1784 T50, 3 7 1 slot addressing, 5 10 2 Get method, 18 20 2 slot addressing, 5 5 2 slot addressing, 7 3 3 digit math instructions Addition, 13 1 Division, 13 3 Multiplication, 13 2 Subtraction, 13 2 3 digit processor control, 16 34 6 digit process control, 16 41 A ac power, 5 18 accumulated values, 11 1 Addition, 13 1, 14 6 addr
I–2 Index module address, 18 6 multiple reads, 18 16 quick reference, E 4 run time errors, 18 8 setting number of words to transfer, 18 26 status bits, 18 7 timing diagram, 18 3 two Get method, 18 20 Block Transfer Read, 18 8 Block Transfer Write, 18 11 branching, 9 8 nesting, 9 11 Start/End, 9 9 buffering data, block transfer, 18 17 bumpless transfer, PID, 16 7 byte, 7 1 C cascading loops, 16 21 cascading timers, 25 4 central processing unit.
Index disposing, batteries, 4 29 distributed complete mode, 19 4 Division, 13 3, 14 8 Down Counter, 11 8 quick reference, E 11 Retentive Timer On/Reset, 11 6 Timer On/Timer Off, 11 4 Up/Down Counter, 11 10 ZCL, 10 5 EEPROM, 1 2, 3 12, 4 29 E EAF, 1 2 EAF instructions 1 operand, 15 1 1 operand math, 14 10 2 operand math, 14 1 FIFO, 15 1 function numbers, E 10 logarithmic, 15 1 math, 14 1 process control, 16 1 trigonometric, 15 1 EAF math instructions 1 operand, 15 1 10 to the X, 14 17 Addition, 14 6 BCD t
I–4 Index FIFO Load/Unload, 15 7 help reference, E 19 file instructions adjusting the data table, 19 18 compared to sequencer instructions, 21 1 complete mode, 19 3 data monitor display, 19 16 data transfer, 19 1 distributed complete mode, 19 4 externally indexed counter, 19 13 File to File Move, 19 2 File to Word Move, 19 14 incremental mode, 19 4 internally indexed counter, 19 2 modes of operation, 19 5 quick reference, E 9 types, 19 1 Word to File Move, 19 13 hexadecimal numbering, C 5 File to File
Index 3 digit Multiplication, 13 2 3 digit Subtraction, 13 2 Addition, 14 6 Average, 16 34 BCD to Binary, 14 19 Binary to BCD, 14 20 bit controlling, 9 5 bit examining, 9 3 Bit Shift Left, 20 1 Bit Shift Right, 20 5 Block Transfer Read, 18 8 Block Transfer Write, 18 11 Branch Start/End, 9 9 branching, 9 8 compare, 12 1, 12 3 Cosine, 15 6 Counter Reset, 11 9 data manipulation, 12 1 Date, 16 47 Day of the Week, 16 48 Division, 14 8 Down Counter, 11 8 Equal To, 12 3 Examine Off, 9 4 Examine Off Bit Shift, 20
I–6 Index Log to Base e, 15 5 logarithmic instructions Log to Base 10, 15 5 Log to Base e, 15 5 logic, 9 1 loop considerations, PID, 16 5 M N nesting branches, 9 11 number systems BCD, C 3 BCO, C 5 binary, C 3 decimal, C 1 hexadecimal, C 5 octal, C 2 machine control, 2 1 maintaining, processor, 6 1 maintenance, preventive, 6 1 mask, 21 2 master control relay, 4 43 Master Control Reset.
Index using block transfer, 16 5 planning conductor categories, 4 3 environment, 4 2 ground connection, 4 10 location, 4 2 mechanical protection, 4 3 power distribution, 4 5 processor system, 4 2 raceway layout guidelines, 4 4 sizing transformers, 4 5 surge suppression, 4 11 undervoltage shutdown, 4 6 power distribution, 4 5 power supplies connecting power, 4 37 installing, 4 31 modules, 3 11 paralleling cable, 3 12 output, 2 8 planning, system, 4 2 power supply, 2 8 process control instructions, 16 1 pro
I–8 Index R raceway layout guidelines, 4 4 Reciprocal, 14 18 recorder, data cartridge, 3 11 related hardware, 4 1 relay like instructions, 9 1 Branch Start/End, 9 9 Examine On/Examine Off, 9 3 Output Energize, 9 5 Output Latch, 9 6 Output Unlatch, 9 6 removing Branch Start/End, 9 9 Equal To, 12 4 Examine On/Examine Off, 9 4 force function, 26 6 Get, 12 2 Immediate Input/Output Update, 10 8 instruction, 24 4 Less Than, 12 5 Output Energize, 9 5 rung, 24 5 Temporary End, 26 8 report generation additional me
Index starting ac power, 5 18 addressing hardware, 5 4 status indicators, 5 3 testing input devices, 5 20 testing output devices, 5 18 verify system addresses, 5 1 status indicators I/O modules, 5 3 troubleshooting with, 6 2 STI Get, 22 3 Label, 22 3 operational overview, 22 4 programming, 22 1 sample program rungs, 22 2 subroutine area, 17 4 subroutine instructions, Subroutine Area, 17 3 Subroutine Programming, 17 1 Subtraction, 13 2, 14 6 surge suppression, 4 11 switch settings, 4 23, E 32 switches input
I–10 Index wiring arms, 4 24, 4 32 word, 7 1 Word to File Move, 19 13 words per instruction, E 12 Y Y to the X, 14 9 Z ZCL, 10 1 Zone Control Last State.
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