Instruction Manual

Summary Word and Bit Tables
Appendix D
D11
Table D.F
Expanded Control W ord W30(W50)
Bit Title Status
B17 PV scaling 0=reset
1=PV in W65(W72) is scaled.
B16 SP scaling 0=reset
1=SP in W06(W13 is scaled.
B15 Error scaling 0=reset
1=ERROR in W62(W69) is scaled.
B14 Decouple 0=reset
1=Loop 1 VPID overrides loop 2 FFI. Used for W30, only . W50 B14 =0
B13 Source of FFI 0=SET FFI in W10(W17)
1=tieback hardware input
B12 FFI sign 0=Feedforward input in positive.
1=negative sign
B11 FFI square root
0=reset
1=normalized square root
B10 Feedforward term multiplica 
tion
0=reset
1=KFx(FFI +FFO), KF is in W34(W54).
B07,B06 Feedforward gainmultiplier See code for W19(W39)B05 thru B00.
B05 Lead/lag 0=reset
1=TB in W35(W55)and TC in W36(W56) are enabled.
B04 Minimum scaling sign 0=SMIN in W31(W51) is positive.
1=negative sign
B03 Maximum scaling sign 0=SMAX in W32(W52) is positive.
1=negative sign.
B02 Source of Bias 0=feedforward term FFV
1= PC processor , W08(W15)
B01 Bias (FFV) sign 0=Bias (FFV) sign is not changed
1=reverse sign
B00 Cascade 0=reset
1=Cascades the output of loop 1 into the set point of loop 2 W50 B00
=0.