Programmer (HHP) User guide

Appendix B
Programming Reference
B–3
Address
Bit Classification Description
S0/8
➀
Extend I/O
Configuration
Static Configuration This bit must be set by the user when unused outputs are written
to. If reset and unused outputs are turned on the controller will
fault (41H).
S0/9 Reserved NA NA
S0/10 Primary Protocol Static Configuration This bit defines the protocol that the controller initially uses when
attempting to establish communication, where:
0 = DF1 (default setting)
1 = DH-485
S0/11 Active Protocol Status This bit is updated by the controller during a protocol switch. It
indicates which protocol is currently being used for
communication, where:
0 = DF1
1 = DH-485
S0/12
➁
Selected DF1
Protocol
Status This bit allows the user to determine which DF1 protocol is
configured, where:
0 = DF1 Full-Duplex (default setting)
1 = DF1 Half-Duplex Slave
S0/13 to S0/15 Reserved NA NA
S1/0 to S1/4
➂
Controller Mode
St
a
tu
s
/ Cont
r
ol
Status Bits 0–4 function as follows:
0
0000
= (
0
)
Re
mot
e
D
ownlo
a
d
i
n p
r
og
ress
0 0001 1 Re e Pr ra e
St
a
tu
s
/ Cont
r
ol
0
0000
= (
0
)
Re
mot
e
D
ownlo
a
d
i
n p
r
og
ress
0 0001 = (1) Remote Program mode
0 0011 = (3) Suspend Idle (operation halted by
i s r c i exec i
0
0011
= (
3
)Su
s
p
e
nd
I
dl
e
(op
era
t
i
on h
a
lt
e
d
b
y
SUS instruction execution)
0 0110 = (6) Remote Run mode
0 0111 7 Re e es c i s e
0 0110 6 Re e R e
0 0111 = (7) Remote Test continuous mode
0 1000 = (8) Remote Test single scan mode
S1/5
➂
Forces Enabled Status This bit is set by the controller (1) to indicate that forces are
always enabled.
S1/6
➂
Forces Installed Status This bit is set by the controller to indicate that forces have been
set by the user.
S1/7
➂
Comms Active Status This bit is set when the controller receives valid data from the
communication port. For DF1 protocols, the bit is reset if the
controller does not receive valid data from the programming port
for 10 seconds.
Note: In DF1 half-duplex mode, simple polls by the DF1 master
or replies to received messages will not reset the timer. A poll
with a command is required to reset the timer.
For DH-485, the bit is reset as soon as the DH-485 link layer
determines that no other devices are active on the link.
Application Note: For DF1 half-duplex, you can use this bit to
enable a timer (via an XIO instruction) to sense whether the DF1
master is actively communicating to the slave. The preset of the
timer is determined by the total network timing.
S1/8
➂
Fault Override at
Powerup
Static Configuration When set, this bit causes the controller to clear the Major Error
Halted bit S:1/13 and Minor error bits S:5/0 to S:5/7 on power up
if the processor had previously been in the REM Run mode and
had faulted. The controller then attempts to enter the REM Run
mode. Set this bit offline only.
➀
Valid for Series A–C discrete only.
➁
This bit is set in the COMMS menu. It is not displayed in the status file of the HHP.
➂
Address is not shown in HHP data monitor.
Reference