Programmer (HHP) User guide

Chapter 15
Using Communication Protocols
15–4
EN ST DN ER EW NR TO Error Code
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved for Length (in elements)
Control Block Layout – CIF
Word
0
1
2
Offset Bytes
Not used
Not used
Not used
3
4
5
6
Node Number
Using Status Bits
Read/Write: READ ignore if timed out: 0TO
Target Device: SLC500/ML1000 to be retried: 0NR
Control Block: N7:0 awaiting execution: 0EW
Local Destination File Address: ***
Target Node: 0 error: 0 ER
Target File Address: *** message done: 0DN
Message Length in elements *** message transmitting: 0ST
message enabled: 0EN
control bit address: N7:0/8
ERROR CODE: 0
Error Code Desc:
MSG Instruction Status Bits
The right column in the display above lists the various MSG instruction
status bits. These are explained below:
• Time Out Bit TO (bit 08) Temporarily set this bit (1) to clear an
existing MSG instruction. This bit has no effect unless the ST bit has first
been set due to receiving an ACK (acknowlege). Your application must
supply its own timeout value. This bit is reset on any false-to-true rung
transition.
• Negative Response Bit NR (bit 09) is set if the target processor is
responding to your message, but can not process the message at the
present time. The NR bit is reset at the next false-to-true MSG rung
transition that has a transmit buffer available. It is used to determine
when to send retries. The ER bit is also set at this time. Use this
feedback to initiate a retry of your message at a later time. This bit is
used with DH-485 protocol only.
• Enabled and Waiting Bit EW (bit 10) is set on any false-to-true MSG
rung transition. This bit is reset when an ACK or NAK (no acknowledge)
is received, or on any true-to-false MSG rung transition.
Important: The operation of the EW bit has changed since Series C.
• Error Bit ER (bit 12) is set when message transmission has failed. The
ER bit is reset the next time the rung goes from false to true.