User guide

Publication 1746-UM006B-EN-P - August 2005

4-28 Configuration and Programming

M0:e.1 Bits 5,6,7 - Reset Mode (Static)

These bits allow you to select the device(s) that reset the counter. Bit

5 enables the Z reset, Bit 6 enables the limit switch reset, and bit 7

enables the soft reset, as shown below:

You can reset the sequencer to the Initial Output pattern (M0:e.3/8-15)

using the Sequencer Reset bit (M0:e.1/0).

Setup and Control Word bits Reset Condition is True

765

000Never

001When Z is ON

010When the limit switch is ON

011When the limit switch and Z are ON

100When the Soft Reset is 1

101When the Soft Reset is 1 and Z is ON

110When the Soft Reset is 1, and limit switch is ON

111When the Soft Reset is 1, limit switch and Z are ON

Setup and Control Word, Word 1

Bit Number (decimal)

Reset

Mode bits

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reset

Limit Switch

Soft Reset

M0:e.1

RRR