User Manual Owner manual

Rockwell Automation Publication 1715-UM001C-EN-P - March 2014 241
Using SIL 2 Add-On Instructions with 1715 Redundant I/O Modules Chapter 7
information. The actual process rate is affected by the periodic task rate and
periodic task scan time.
The worst case safety reaction time can be calculated using the formulas shown
below.
For the example below, assume the following:
1715 Input Module RPI = 60 ms
1715 Output Module RPI = 80 ms
SIL 2 Task Period = 30 ms
SIL 2 Task Watchdog = 20 ms
AOI Module RPI=60 ms
If you are not using COS, the worst case reaction time from input screw terminal
to output screw terminal is equal to 210 ms plus the following:
Input RPI
Output RPI
Add-On Instruction Module RPI/2
SIL 2 Task Period x 6
SIL 2 Task Watchdog x 2
Table 48 - Worst Case Reaction Time Calculations
Worst Case Factors Value Fixed
Time (ms)
User
Configurable
Time (ms)
Description
1715 Input Module Delay 15
1715 Backplane Rate 65
1715-AENTR Delay 25
Input Data to ControlLogix COS=NO 1715 Input Module RPI 60 COS = Change of State
COS=YES Fixed 60
Add-On Instruction Module RPI AOI Module RPI/2 30 Value entered into the AOI Module_RPI parameter
ControlLogix SIL2 Task Period SIL 2 Task Period 30 Input data asynchronous to scan
ControlLogix SIL2 Task Period SIL 2 Task Period 30 SIL 2 task period
ControlLogix SIL2 Task Period SIL 2 Task Period 30 SIL 2 task period
ControlLogix SIL2 Task Watchdog SIL 2 Task Watchdog 20 ControlLogix system runs input module AOI and controls requested
output
Assumes requested output in same SIL 2 task as 1715 SIL 2 AOIs
Add-On Instruction Module RPI AOI Module RPI/2 30 Value entered into the AOI Module_RPI parameter
ControlLogix SIL2 Task Period SIL 2 Task Period 30 AOIs are timer based; input and output AOI timers can be
asynchronous
ControlLogix SIL2 Task Period SIL 2 Task Period 30 SIL 2 task period
ControlLogix SIL2 Task Period SIL 2 Task Period 30 SIL 2 task period
ControlLogix SIL2 Task Watchdog SIL 2 Task Watchdog 20 ControlLogix system runs output module Add-On Instruction and
places requested outputs in output module raw data
Output Data to 1715-AENTR 1715 Output Module RPI 80
1715-AENTR Delay 25
1715 Backplane Rate 65
1715 Output Module Delay 15