Instruction Manual

Firmware Block Diagrams A–9
Publication 1397-5.0 — June, 2001
Figure A.9
Current Minor Loop
A1
(J18 ARM FDBK RES)
Hardware scaling jumper
J18 “ARM FDBK RES”
* Default Selection
RECTIFIER
RATE LIM
DRIVE TEST
MODE
Current Loop Kp
(P. 063)
+
KP
From Current
Minor Loop
Reference
Block Diagram
Cur–Loop
K–Fdbk
(P. 061)
Cur Loop Ref
(P. 008)
MOTOR
Ground
Jumper J22
“GROUND”
Current
Feedback
Test Point
Jumper J17
“ARM 1”
15 ohm
DIFF
IN
OUT
KI
PI
PHASE
FIRING
LOGIC
ARM BRIDGE
(P. 171)
ARM DELTA
(P. 172)
S6/S6R
POWER
UNIT
A2
ADAPTIVE
GAIN
LOGIC
Cur Loop Fdbk
(P. 006)
OUT
IN
MUL
GAIN
SOFTWARE
SCALING
ANALOG
TO DIGITAL
CONVERTER
20k ohm
20 ohm 30 ohm 39 ohm
1234
Cur Lp
Lead Freq
(P. 062)
ARM PHASE FIRE
3 – Phase
AC Line
CT TURNS RATIO
(P. 036)