Datasheet

ManualsBrandsRND Components ManualsCapacitorsCeramic Capacitor 100nF, 630VDC, 1812, ±10 %

SPECIFICATION:

Construcon form 1812

Ceramic type X7R

Capacitance tolerance ±10%

Dimensions L x H x W 4.5 x 3.0 x 3.2 mm

Temperature range -55...+125 °C

Height 3.0 mm

Length 4.5 mm

Width 3.2 mm

Multilayer Capacitors, SMD

Multilayer Ceramic Capacitors, 1812, X7R

PRODUCT RANGE:

Art. Nr. Capacitance Rated voltage

RND 150-1812B102K302N1 1.0 nF 3000 VDC

RND 150-1812B103K102N1 10 nF 1000 VDC

RND 150-1812B103K631N1 10 nF 630 VDC

RND 150-1812B104K631N1 100 nF 630 VDC

RND 150-1812B105K101N1 1.0 µF 100 VDC

RND 150-1812B222K631N1 2.2 nF 630 VDC

Distrelec Schweiz AG, Grabenstrasse 6, 8606 Nänikon, Switzerland, T +41 44 944 99 11, info@distrelec.com, distrelec.com

Summary of content (4 pages)

PAGE 1
Multilayer Capacitors, SMD Multilayer Ceramic Capacitors, 1812, X7R SPECIFICATION: Construction form Ceramic type Capacitance tolerance Dimensions L x H x W Temperature range Height Length Width PRODUCT RANGE: Art. Nr. RND 150-1812B102K302N1 RND 150-1812B103K102N1 RND 150-1812B103K631N1 RND 150-1812B104K631N1 RND 150-1812B105K101N1 RND 150-1812B222K631N1 1812 X7R ±10% 4.5 x 3.0 x 3.2 mm -55...+125 °C 3.0 mm 4.5 mm 3.2 mm Capacitance 1.0 nF 10 nF 10 nF 100 nF 1.0 µF 2.
PAGE 2
Multilayer Ceramic Capacitors, 0402, Y5V PCB design Chip components are susceptible to board stress since the component itself is mounted directly on the board. They are also sensitive to mechanical and thermal stress when solder, which may cause chip cracked. Please take solder form and component layout into consideration to eliminate stress. Pattern form (1) Placing of chip components and component. incorrect correct (2) Placing close to chassis.
PAGE 3
(4) Lateral mounting correct incorrect Component direction To design a mounting position that minimizes the stress imposed on the chip during flexing or bending of the board. (1) put the component lateral to the direction in which stress acts. (2) Component layout close to board separation point.
PAGE 4
12.3. Land Pattern When capacitors are mounted on P.C. board, the amount of solder directly affect the performance of capacitors. Therefore, the following items should be carefully considered in the design of solder land pattern. (1) The greater the amount of solder, the higher the stress on the chip capacitors, and lead to cracking and breaking likely. It is necessary the appropriate size and configuration of the solder pads should be designed to have proper amount of solder on the termination.