User`s guide

User's Guide HDSP System HDSP 9632 © RME
79
Word Clock
2 x BNC, separated driver stage
Max. output voltage: 5 Vpp
Output voltage @ 75 Ohm termination: 4.0 Vpp
Output impedance: 10 Ohm
Frequency range: 27 kHz – 200 kHz
32.4 Digital
Clocks: Internal, ADAT In, SPDIF In, optional word clock in
Low Jitter Design: < 1 ns in PLL mode, all inputs
Internal clock: 800 ps Jitter, Random Spread Spectrum
Jitter suppression of external clocks: > 30 dB (2.4 kHz)
Effective clock jitter influence on AD and DA conversion: near zero
PLL ensures zero dropout, even at more than 100 ns jitter
Digital Bitclock PLL for trouble-free varispeed ADAT operation
Supported sample rates: 28 kHz up to 200 kHz
32.5 MIDI
1 x MIDI I/O via 5-pin DIN jacks
Galvanically isolated by optocoupled input
Hi-speed mode: Jitter and response time typically below 1 ms
Separate 128 byte FIFOs for input and output