User`s guide
User’s Guide HDSP System HDSP 9652 © RME
5
4. Brief Description and Characteristics
• Hammerfall design: 0% (zero!) CPU load, even using all 52 ASIO channels
• All settings can be changed in real-time
• Enhanced mixed mode: ADAT In, SPDIF In, and all outputs can be used simultaneously
• 8 available buffer sizes/latencies: 1.5 / 3 / 6 / 12 / 23 / 46 / 93 / 186 ms
• Sample Split technology for 12 channel, 96 kHz/24-bit record/playback via ADAT optical
• Slave and master clock modes
• Automatic and intelligent master/slave clock control
• Unsurpassed Bitclock PLL (audio synchronization) in ADAT mode
• Word clock input and output
• ADAT Sync in (9-pin D-type) for sample-accurate transfer
• Zero Latency Monitoring: Hardware bypass per track, controlled by Punch in/out
• Enhanced ZLM for latency-free submixes and perfect ASIO Direct Monitoring
• SyncAlign guarantees sample aligned and never swapping channels
• SyncCheck tests and reports the synchronization status of input signals
• 2 x MIDI I/O, 32 channels high-speed MIDI
• DIGICheck DSP: Level meter in hardware, peak- and RMS calculation
• TotalMix: 1352 channel mixer with 40 bit internal resolution
5. Technical Specifications
5.1 Digital
• Low jitter SPDIF: < 3 ns in PLL mode (44.1 kHz, optical in)
• Low jitter ADAT: < 2 ns in PLL mode (44.1 kHz, optical in)
• Input PLL ensures zero dropout, even at more than 40 ns jitter
• Bitclock PLL for trouble-free varispeed operation in ADAT mode
• High-sensitivity input stage (< 0.2 Vss input level)
• Output voltage 0.8 V (consumer mode, phono) or 2.3 V (professional mode)
• Sample frequencies: 32 / 44.1 / 48 / 88.2 / 96 kHz and variable
5.2 Digital Interface
• Phono input and output ground-free transformer coupled
• Connectors: optical (TOSLINK), phono, BNC
• Clocks: ADAT Sync In, word clock I/O
• Formats: SPDIF (Consumer and Professional), ADAT optical
5.3 MIDI
• 2 x MIDI I/O via breakout cable
• PCI bus based hi-speed operation
• Seperate 128 byte FIFO for input and output
• MIDI state machine in hardware for reduced interrupt request load